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GS81302D38E-400 Datasheet, PDF (4/31 Pages) GSI Technology – Dual Double Data Rate interface
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GS81302D06/11/20/38E-500/450/400/350
16M x 9 SigmaQuad-II SRAM—Top View
1
2
3
4
5
6
7
8
9
10
11
A
CQ
SA
SA
W
NC
K
SA
R
SA
SA
CQ
B
NC
NC
NC
SA
NC/SA
(288Mb)
K
BW0
SA
NC
NC
Q4
C
NC
NC
NC
VSS
SA
NC
SA
VSS
NC
NC
D4
D
NC
D5
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
Q5
VDDQ
VSS
VSS
VSS
VDDQ
NC
D3
Q3
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
D6
Q6
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
Doff
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
Q2
D2
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
Q7
D7
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
Q1
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
D1
N
NC
D8
NC
VSS
SA
SA
SA
VSS
NC
NC
NC
P
NC
NC
Q8
SA
SA
QVLD
SA
SA
NC
D0
Q0
R
TDO
TCK
SA
SA
SA
ODT
SA
SA
SA
TMS
TDI
11 x 15 Bump BGA—15 x 17 mm2 Body—1 mm Bump Pitch
Notes:
1. BW0 controls writes to D0:D8.
2. Pin B5 is the expansion address.
Rev: 1.05c 8/2017
4/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology
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