GS880V37AT Datasheet, PDF (3/18 Pages) GSI Technology – 256K x 36 9Mb Sync Burst SRAMs

TQFP Pin Description
Symbol
A0, A1
A
DQA
DQB
DQC
DQD
NC
BW
BA, BB
BC, BD
CK
GW
E1, E3
E2
G
ADV
ADSP, ADSC
ZZ
LBO
V_DDQ
V_SS
V_DDQ
Type
I
I
I/O
—
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
V_DDQ/DNU
I
GS880V37AT-250/225/200
Description
Address field LSBs and Address Counter preset Inputs
Address Inputs
Data Input and Output pins
No Connect
Byte Write—Writes all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Byte Write Enable for DQC, DQD Data I/Os; active low
Clock Input Signal; active high
Global Write Enable—Writes all bytes; active low
Chip Enable; active low
Chip Enable; active high
Output Enable; active low
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep Mode control; active high
Linear Burst Order mode; active low
Core power supply
I/O and Core Ground
Output driver power supply
V_DDQ or V_DD (must be tied high)
or
Do Not Use (must be left floating)
Rev: 1.03 7/2004
3/18
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2002, GSI Technology