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GS81302DT10GE-333 Datasheet, PDF (25/30 Pages) GSI Technology – Dual Double Data Rate interface | |||
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GS81302DT07/10/19/37E-450/400/350/333/300
JTAG Port Recommended Operating Conditions and DC Characteristics
Parameter
Symbol
Min.
Max.
Unit Notes
Test Port Input Low Voltage
VILJ
â0.3
0.3 * VDD
V
1
Test Port Input High Voltage
VIHJ
0.7 * VDD
VDD +0.3
V
1
TMS, TCK and TDI Input Leakage Current
IINHJ
â300
1
uA
2
TMS, TCK and TDI Input Leakage Current
IINLJ
â1
100
uA
3
TDO Output Leakage Current
IOLJ
â1
1
uA
4
Test Port Output High Voltage
VOHJ
VDD â 0.2
â
V
5, 6
Test Port Output Low Voltage
VOLJ
â
0.2
V
5, 7
Test Port Output CMOS High
VOHJC
VDD â 0.1
â
V
5, 8
Test Port Output CMOS Low
VOLJC
â
0.1
V
5, 9
Notes:
1. Input Under/overshoot voltage must be â1 V < Vi < VDDn +1 V not to exceed 2.9 V maximum, with a pulse width not to exceed 20% tTKC.
2. VILJ ï£ VIN ï£ï VDDn
3. 0 V ï£ï VIN ï£ï VILJn
4. Output Disable, VOUT = 0 to VDDn
5. The TDO output driver is served by the VDD supply.
6. IOHJ = â2 mA
7. IOLJ = + 2 mA
8. IOHJC = â100 uA
9. IOLJC = +100 uA
JTAG Port AC Test Conditions
Parameter
Conditions
Input high level
VDD â 0.2 V
Input low level
0.2 V
Input slew rate
1 V/ns
Input reference level
VDD/2
Output reference level
VDD/2
Notes:
1. Include scope and jig capacitance.
2. Test conditions as shown unless otherwise noted.
JTAG Port AC Test Load
TDO
50ï
30pF*
VDD/2
* Distributed Test Jig Capacitance
Rev: 1.00b 8/2017
25/30
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology
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