GS81302D38AGD-450I Datasheet, PDF (24/26 Pages) GSI Technology – 144Mb SigmaQuad-II+ Burst of 4 SRAM

JTAG Port AC Test Conditions
Parameter
Conditions
Input high level
V_DD – 0.2 V
Input low level
0.2 V
Input slew rate
1 V/ns
Input reference level
V_DD/2
Output reference level
V_DD/2
Notes:
1. Include scope and jig capacitance.
2. Test conditions as shown unless otherwise noted.
Preliminary
GS81302D20/38AGD-633/550/500/450
JTAG Port AC Test Load
TDO
50
30pF^*
V_DD/2
* Distributed Test Jig Capacitance
TCK
TDI
TMS
TDO
Parallel SRAM input
JTAG Port Timing Diagram
tTKC
tTKH
tTKL
tTH
tTS
tTH
tTS
tTKQ
tTH
tTS
JTAG Port AC Electrical Characteristics
Parameter
TCK Cycle Time
TCK Low to TDO Valid
TCK High Pulse Width
TCK Low Pulse Width
TDI & TMS Set Up Time
TDI & TMS Hold Time
Symbol
tTKC
tTKQ
tTKH
tTKL
tTS
tTH
Min Max Unit
50
—
ns
—
20
ns
20
—
ns
20
—
ns
10
—
ns
10
—
ns
Rev: 1.00b 5/2017
24/26
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2017, GSI Technology