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GS81302T07 Datasheet, PDF (2/31 Pages) GSI Technology – 144Mb SigmaDDRTM-II+ Burst of 2 SRAM
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GS81302T07/10/19/37E-450/400/350/333/300
16M x 8 SigmaDDR-II+ SRAM—Top View
1
2
3
4
5
6
7
8
9
10
11
A
CQ
SA
SA
R/W
NW1
K
SA
LD
SA
SA
CQ
B
NC
NC
NC
SA
NC/SA
(288Mb)
K
NW0
SA
NC
NC
DQ3
C
NC
NC
NC
VSS
SA
SA
SA
VSS
NC
NC
NC
D
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
E
NC
NC
DQ4
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
DQ2
F
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
G
NC
NC
DQ5
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
H
Doff
VREF
VDDQ
VDDQ
VDD
VSS
VDD
VDDQ
VDDQ
VREF
ZQ
J
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
DQ1
NC
K
NC
NC
NC
VDDQ
VDD
VSS
VDD
VDDQ
NC
NC
NC
L
NC
DQ6
NC
VDDQ
VSS
VSS
VSS
VDDQ
NC
NC
DQ0
M
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
N
NC
NC
NC
VSS
SA
SA
SA
VSS
NC
NC
NC
P
NC
NC
DQ7
SA
SA
QVLD
SA
SA
NC
NC
NC
R
TDO
TCK
SA
SA
SA
ODT
SA
SA
SA
TMS
TDI
11 x 15 Bump BGA—15 x 17 mm2 Body—1 mm Bump Pitch
Notes:
1. NW0 controls writes to DQ0:DQ3; NW1 controls writes to DQ4:DQ7.
2. Pin B5 is the expansion address.
Rev: 1.03a 11/2011
2/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology
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