GS8320EV18T Datasheet, PDF (17/24 Pages) GSI Technology – 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs

Preliminary
GS8320EV18/32/36T-250/225/200/166/150/133
Pipeline Mode Timing (DCD)
Begin Read A Cont
CK
Deselect Deselect Write B
tKL
tKH
tKC
Read C Read C+1 Read C+2 Read C+3 Cont
ADSP
ADSC
ADV
Ao–An
GW
BW
Ba–Bd
E1
E2
E3
tS
tH
tS
tS
tH
A
tS
tS
tS
tH
tS
tH
tS
tH
ADSC initiated read
tH
B
C
tH
tH
tS
E2 and E3 only sampled with ADSC
G
DQa–DQd Hi-Z
tOE
tOHZ
Q(A)
tS
tH
D(B)
tKQ
tLZ
Q(C)
Q(C+1)
Q(C+2)
Deselect Deselect
Deselected with E1
Q(C+3)
tHZ
tKQX
Rev: 1.02 10/2004
17/24
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology