GS8180QV36BD-167I Datasheet, PDF (17/28 Pages) GSI Technology – 18Mb Burst of 2 SigmaQuad SRAM

GS8180QV18/36BD-200/167
AC Electrical Characteristics
Parameter
Symbol
-200
Min Max
K, K Clock Cycle Time
C, C Clock Cycle Time
t_KHKH
t_CHCH
5.0
—
K, K Clock High Pulse Width
C, C Clock High Pulse Width
t_KHKL
t_CHCL
2.0
—
K, K Clock Low Pulse Width
C, C Clock Low Pulse Width
t_KLKH
t_CLCH
2.0
—
K Clock High to K Clock High
C Clock High to C Clock High
t_KHKH
t_CHCH
2.2
K Clock High to K Clock High
C Clock High to C Clock High
t_KHKH
t_CHCH
2.2
K, K Clock High to C, C Clock High
t_KHCH
0
1.7
Address Input Setup Time
t_AVKH
0.6
—
Address Input Hold Time
t_KHAX
0.6
—
Control Input Setup Time
t_BVKH
0.6
—
Control Input Hold Time
t_KHBX
0.6
—
Data and Byte Write Input Setup Time
t_DVKH
0.6
—
Data and Byte Write Input Hold Time
t_KHDX
0.6
—
K, K Clock High to Data Output Valid
C, C Clock High to Data Output Valid
t_KHQV
t_CHQV
—
2.3
K, K Clock High to Data Output Hold
C, C Clock High to Data Output Hold
t_KHQX
t_CHQX
1.2
—
K Clock High to Data Output Low-Z
C Clock High to Data Output Low-Z
t_KHQX1
t_CHQX1
1.2
—
K Clock High to Data Output High-Z
C Clock High to Data Output High-Z
t_KHQZ
t_CHQZ
—
2.3
Notes:
1. These parameters apply to control inputs R and W.
2. These parameters are guaranteed by design and characterization. Not 100% tested.
3. These parameters are measured at ±50mV from steady state voltage.
4. t_KHKH Max is specified by t_KHKH Min. t_CHCH Max is specified by t_CHCH Min.
-167
Min Max
6.0
—
2.4
—
2.4
—
2.7
—
2.7
—
0
2.0
0.7
—
0.7
—
0.7
—
0.7
—
0.7
—
0.7
—
—
2.5
1.2
—
1.2
—
—
2.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
4
1
1
2
2,3
2,3
Rev: 1.02b 11/2011
17/28
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2007, GSI Technology