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GS8256436GB-200IV Datasheet, PDF (16/33 Pages) GSI Technology – 16M x 18, 8M x 36 288Mb DCD Sync Burst SRAMs
GS8256418/36(GB/GD)-xxxV
AC Test Conditions
Parameter
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.
3. Device is deselected as defined by the Truth Table.
Conditions
VDD – 0.2 V
0.2 V
1 V/ns
VDD/2
VDDQ/2
Fig. 1
DC Electrical Characteristics
Parameter
Input Leakage Current
(except mode pins)
ZZ Input Current
FT, ZQ Input Current
Output Leakage Current
Output High Voltage
Output High Voltage
Output Low Voltage
Output Load 1
DQ
50
30pF*
VDDQ/2
* Distributed Test Jig Capacitance
Symbol
IIL
IIN1
IIN2
IOL
VOH2
VOH3
VOL
Test Conditions
VIN = 0 to VDD
VDD  VIN  VIH
0 V VIN VIH
VDD  VIN  VIL
0 V VIN VIL
Output Disable, VOUT = 0 to VDD
IOH = –8 mA, VDDQ = 2.375 V
IOH = –8 mA, VDDQ = 3.135 V
IOL = 8 mA
Min
–1 uA
–1 uA
–1 uA
–100 uA
–1 uA
–1 uA
1.7 V
2.4 V
—
Max
1 uA
1 uA
100 uA
1 uA
1 uA
1 uA
—
—
0.4 V
Rev: 1.03 5/2017
16/32
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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