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GS81302Q18AGD-333 Datasheet, PDF (16/29 Pages) GSI Technology – 144Mb SigmaQuadTM-II Burst of 2 SRAM
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Preliminary
GS81302Q18/36AGD-400/375/333/300/250
Input and Output Leakage Characteristics
Parameter
Input Leakage Current
(except mode pins)
Doff
Symbol
IIL
IILDOFF
Output Leakage Current
IOL
Test Conditions
VIN = 0 to VDD
VIN = 0 to VDD
Output Disable,
VOUT = 0 to VDDQ
Min.
–2 uA
–2 uA
–2 uA
Max
2 uA
100 uA
2 uA
Programmable Impedance HSTL Output Driver DC Electrical Characteristics
Parameter
Symbol
Min.
Output High Voltage
VOH1
VDDQ/2 – 0.12
Output Low Voltage
VOL1
VDDQ/2 – 0.12
Output High Voltage
VOH2
VDDQ – 0.2
Output Low Voltage
VOL2
Vss
Notes:
1. IOH = (VDDQ/2) / (RQ/5) +/– 15% @ VOH = VDDQ/2 (for: 175 RQ  350
2. IOL = (VDDQ/2) / (RQ/5) +/– 15% @ VOL = VDDQ/2 (for: 175  RQ  350.
3. Parameter tested with RQ = 250 and VDDQ = 1.5 V or 1.8 V
4. 0RQ  
5. IOH = –1.0 mA
6. IOL = 1.0 mA
Max.
VDDQ/2 + 0.12
VDDQ/2 + 0.12
VDDQ
0.2
Units
V
V
V
V
Notes
1, 3
2, 3
4, 5
4, 6
Operating Currents
-400
-375
Parameter Symbol
Test Conditions
0
–40
0
–40
to
to
to
to
70°C 85°C 70°C 85°C
Operating Current
(x36): DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time tKHKH Min
TBD TBD TBD TBD
Operating Current
(x18): DDR
IDD
VDD = Max, IOUT = 0 mA
Cycle Time tKHKH Min
TBD TBD TBD TBD
Standby Current
(NOP): DDR
Device deselected,
ISB1
IOUT = 0 mA, f = Max,
TBD TBD TBD TBD
All Inputs 0.2 V or VDD – 0.2 V
Notes:
1. Power measured with output pins floating.
2. Minimum cycle, IOUT = 0 mA
3. Operating current is calculated with 50% read cycles and 50% write cycles.
4. Standby Current is only after all pending read and write burst operations are completed.
-333
0
–40
to
to
70°C 85°C
TBD TBD
TBD TBD
TBD TBD
-300
0
–40
to
to
70°C 85°C
TBD TBD
TBD TBD
TBD TBD
-250
0
–40 Notes
to
to
70°C 85°C
TBD TBD 2, 3
TBD TBD 2, 3
TBD TBD 2, 4
Rev: 1.00a 5/2017
16/29
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2017, GSI Technology
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