GS82582Q36GE-333I Datasheet, PDF (12/32 Pages) GSI Technology – 288Mb SigmaQuad-IITM Burst of 2 SRAM

GS82582Q18/36GE-357/333/300/250
Separate I/O SigmaQuad-II B2 SRAM Write Truth Table
A
W
BWn
BWn
Input Next State
D
K
K
K
K
K K 
K
(t_{n + ½})
(t_n)
(t_n)
(t_{n + ½})
(t_n), (t_{n + ½})
(t_n)
V
0
0
0
Write Byte Dx0, Write Byte Dx1
D0
V
0
0
1
Write Byte Dx0, Write Abort Byte Dx1
D0
V
0
1
0
Write Abort Byte Dx0, Write Byte Dx1
X
X
0
1
1
Write Abort Byte Dx0, Write Abort Byte Dx1
X
X
1
X
X
Deselect
X
Notes:
1. X = Don’t Care, H = High, L = Low, V = Valid.
2. W is evaluated on the rising edge of K.
3. D0 and D1 are the first and second data input transfers in a write.
4. BWn represents any of the Byte Write Enable inputs (BW0, BW1, etc.).
x36 Byte Write Enable (BWn) Truth Table
BW0 BW1 BW2 BW3
1
1
1
1
0
1
1
1
1
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
1
0
0
1
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
1
0
1
1
0
0
0
1
0
0
1
0
0
0
0
0
0
0
D0–D8
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
Don’t Care
Data In
D9–D17
Don’t Care
Don’t Care
Data In
Data In
Don’t Care
Don’t Care
Data In
Data In
Don’t Care
Don’t Care
Data In
Data In
Don’t Care
Don’t Care
Data In
Data In
D18–D26
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Data In
Data In
Data In
Data In
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Data In
Data In
Data In
Data In
D
K
(t_{n + ½})
D1
X
D1
X
X
D27–D35
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Data In
Data In
Data In
Data In
Data In
Data In
Data In
Data In
Rev: 1.04 4/2016
12/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2012, GSI Technology