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GS816273CC-250V Datasheet, PDF (12/28 Pages) GSI Technology – 256K x 72 18Mb S/DCD Sync Burst SRAMs
Preliminary
GS816273CC-250V
VDDQ2 & VDDQ1 Range Logic Levels
Parameter
Symbol Min.
Typ.
Max.
Unit Notes
VDD Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V
1,2
VDD Input Low Voltage
VIL
–0.3
—
0.3*VDD
V
1,2
I/O Input High Voltage
VIHQ
2.0
—
VDD + 0.3
V
1,3
I/O Input Low Voltage
VILQ
–0.3
—
0.8
V
1,3
Notes:
4. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
5. Applies to input-only pins (e.g., address, clock, or control pins)
6. Applies to I/O pins (e.g., DQ pins)
Undershoot Measurement and Timing
VIH
VSS
50%
VSS – 2.0 V
20% tKC
Overshoot Measurement and Timing
VDD + 2.0 V
50%
20% tKC
VDD
VIL
Recommended Operating Temperatures
Parameter
Symbol Min.
Typ.
Max.
Unit Notes
Ambient Temperature (Commercial Range Versions)
TA
0
25
70
°C
2
Ambient Temperature (Industrial Range Versions)
TA
–40
25
85
°C
2
Note:
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifications
quoted are evaluated for worst case in the temperature range marked on the device.
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 2.5 V)
Parameter
Symbol
Input Capacitance
CIN
Input/Output Capacitance
CI/O
Note:
These parameters are sample tested.
Test conditions
VIN = 0 V
VOUT = 0 V
Typ. Max. Unit
4
5
pF
6
7
pF
Rev: 1.01a 6/2006
12/28
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2005, GSI Technology