GS8662DT11BGD-400 Datasheet, PDF (10/33 Pages) GSI Technology – 72Mb SigmaQuad-II+TM Burst of 4 SRAM

GS8662DT20/38BD-550/500/450/400/350
GS8662DT06/11BD-500/450/400/350
Byte Write Clock Truth Table
BW
BW
BW
BW
Current Operation
D
D
D
D
K
(t_n+1)
T
K
(t_n+1½)
T
K
(t_n+2)
T
K
(t_n+2½)
T
K
(t_n)
Write
Dx stored if BWn = 0 in all four data transfers
K
(t_n+1)
D0
K
(t_n+1½)
D2
K
(t_n+2)
D3
K
(t_n+2½)
D4
T
F
F
F
Write
Dx stored if BWn = 0 in 1st data transfer only
D0
X
X
X
F
T
F
F
Write
Dx stored if BWn = 0 in 2nd data transfer only
X
D1
X
X
F
F
T
F
Write
Dx stored if BWn = 0 in 3rd data transfer only
X
X
D2
X
F
F
F
T
Write
Dx stored if BWn = 0 in 4th data transfer only
X
X
X
D3
F
F
F
F
Write Abort
No Dx stored in any of the four data transfers
X
X
X
X
Notes:
1. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
2. If one or more BWn = 0, then BW = “T”, else BW = “F”.
Rev: 1.00b 8/2017
10/33
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology