GS82582Q19GE-400I Datasheet, PDF (1/25 Pages) GSI Technology – 288Mb SigmaQuad-II+TM Burst of 2 SRAM

GS82582Q19/37GE-400/375/333/300
165-Bump BGA
Commercial Temp
Industrial Temp
288Mb SigmaQuad-II+^TM
Burst of 2 SRAM
400 MHz–300 MHz
1.8 V V_DD
1.8 V and 1.5 V I/O
Features
• 2.0 clock Latency
• Simultaneous Read and Write SigmaQuad™ Interface
• JEDEC-standard pinout and package
• Dual Double Data Rate interface
• Byte Write controls sampled at data-in time
• On-Die Termination (ODT) on Data (D), Byte Write (BW),
and Clock (K, K) inputs
• Burst of 2 Read and Write
• 1.8 V +100/–100 mV core power supply
• 1.5 V or 1.8 V HSTL Interface
• Pipelined read operation
• Fully coherent read and write pipelines
• ZQ pin for programmable output drive strength
• Data Valid Pin (QVLD) Support
• IEEE 1149.1 JTAG-compliant Boundary Scan
• RoHS-compliant 165-bump BGA package
SigmaQuad™ Family Overview
The GS82582Q19/37GE are built in compliance with the
SigmaQuad-II+ SRAM pinout standard for Separate I/O
synchronous SRAMs. They are 301,989,888-bit (288Mb)
SRAMs. The GS82582Q19/37GE SigmaQuad SRAMs are just
one element in a family of low power, low voltage HSTL I/O
SRAMs designed to operate at the speeds needed to implement
economical high performance networking systems.
Clocking and Addressing Schemes
The GS82582Q19/37GE SigmaQuad-II+ SRAMs are
synchronous devices. They employ two input register clock
inputs, K and K. K and K are independent single-ended clock
inputs, not differential inputs to a single differential clock input
buffer.
Each internal read and write operation in a SigmaQuad-II+ B2
RAM is two times wider than the device I/O bus. An input data
bus de-multiplexer is used to accumulate incoming data before
it is simultaneously written to the memory array. An output
data multiplexer is used to capture the data produced from a
single memory array read and then route it to the appropriate
output drivers as needed. Therefore the address field of a
SigmaQuad-II+ B2 RAM is always one address pin less than
the advertised index depth (e.g., the 16M x 18 has an 8M
addressable index).
Parameter Synopsis
tKHKH
tKHQV
-400
2.5 ns
0.45 ns
-375
3.3 ns
0.45 ns
-333
4.0 ns
0.45 ns
-300
5.0 ns
0.45 ns
Rev: 1.04 4/2016
1/25
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2012, GSI Technology