GVXO-753_16 Datasheet, PDF (1/2 Pages) Golledge Electronics Ltd – 3.3V SM VCXO

3.3V SM VCXO
2011/65/EU
7.00
±0.20
5.00
±0.20
Features
 ^{3.3V supply}
 ^{Low cost for volume applications}
 ^{Enable / disable tristate function (6-pad)}
Enable / Disable Function (GVXO-753F)
Input (pad 2)
Open
‘1‘ level
‘0‘ level
Output (pad 4)
Enabled
Enabled
High Impedance
GVXO-753
Specifications
GVXO-753D:  4 pads, No Enable / Disable
GVXO-753F:  6 pads, Enable / Disable function
Parameters
Package:
4 pads, 5.08mm pitch
6 pads, 2.54mm pitch
Frequency range: 1.50 ~ 54.0MHz
Variant
D
F




Option
Codes
Voltage control:
+1.65V ±1.50V, 10% linearity


Frequency pullability (min):
±50ppm

±100ppm

±120ppm

Other


N

S

V

specify
Frequency stability (max):
±50ppm

±25ppm

Other


B

C

specify
Operating temperature range:
-20 to +70°C

-40 to +85°C

Other



I

specify
Storage temperature range:
-40 to +85°C


Supply voltage (V_DD):
+3.3V (±10%)


Supply current:
10mA max (1.5 ~ 20.0MHz)


15mA max (>20.0 ~ 30.0MHz)


20mA max (>30.0 ~ 40.0MHz)


25mA max (>40.0MHz)


Driving ability:
15pF CMOS


Logic levels: ‘0’ level = 10%V_DD max


‘1’ level = 90%V_DD min


Waveform symmetry: 45:55 max


Rise / fall time (10%~90%V_DD):
10ns max (1.5 ~ 10.0MHz)


6ns max (>10.0MHz)


Enable / disable function:
Tristate (control via pad 2)

Phase noise (typ):
-130dBc/Hz @ 1kHz


 Standard.  Optional - Please specify required code(s) when ordering
Ordering Information
Product + option codes + frequency
eg: GVXO-753D/SC 16.384MHz ±100ppm pullability, ±25ppm stability
GVXO-753F/VB 35.3280MHz ±120ppm pullability, ±50ppm stability
Option codes must be included to fully specify a model.
Option code X (eg GVXO-753F/X) denotes a custom spec.
Tel: [phone]
15 Sep 2009
Fax: [phone]
E-mail: [e-mail]
Web: www.golledge.com