G2992_06 Datasheet, PDF (6/7 Pages) Global Mixed-mode Technology Inc – 3A DDR Bus Termination Regulator

Global Mixed-mode Technology Inc.
Pin Description
G2992
PIN
1
2
3
4
5,7,8
6
NAME
VIN
GND
VREF
VOUT
NC
VCNTL
FUNCTION
Terminator Power pin.
Ground
Terminator reference input voltage, 1.25V for DDR I, 0.9V for DDR II. Below 0.2V, the chip
will be shutdown.
Terminator output pin (V_TT voltage supplied)
No Connection
Internal circuit power pin, at least 3.3V
Block Diagram
VREF
VCNTL
Shutdown
+
VIN
VOUT
GND
Application Information
Output Capacitor
For stable operation, total capacitance of the V_TT out-
put terminal can be equal or greater than 20µF. The
output capacitor should be located near V_TT output
terminal as close as possible to minimize the effect of
ESR and ESL.
Power on sequence
For safely operation, The G2992 must keep V_CNTL
voltage larger than V_IN, this condition is due to the in-
ternal parasitic diodes between V_IN to V_CNTL. The
G2992 will consume large current when V_IN voltage is
larger than V_CNTL.
Consideration of the V_REF Voltage
The V_REF voltage is applied by a buffered mid-rail
voltage which is generated by a resistor divider be-
tween V_IN and GND. Using a capacitor tapped to the
voltage divider can form a low-pass filter. It can in-
crease both the soft-start interval and the noise immu-
nity.
Input Capacitor
Adding a capacitance close to V_IN pin can improve the
V_TT performance when fast load- transient. In general,
1/2 C_OUT is recommended for the V_IN capacitance.
Separating the V_IN and V_CNTL pins will get better tran-
sient performance.
A ceramic capacitance with a value between 1.0µF
and 4.7µF close to the V_CNTL pin is recommended to
stabilize the V_CNTL voltage.
Ver: 1.0
Aug 29, 2006
TEL: [phone]
http://www.gmt.com.tw
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