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G2996 Datasheet, PDF (11/13 Pages) Global Mixed-mode Technology Inc – DDR I/II Termination Regulator
Global Mixed-mode Technology Inc.
G2996
In Figure 5 & 6, they are the application configurations
of DDR-II SDRAM bus terminations. Figure 5 is the
typical application scheme of DDR-II SDRAM. With the
separate VDDQ pin and an internal resistor divider, it
is possible to use the G2996 in applications utilizing
DDR-II memory. Figure 6 is used to increase the driv-
ing capability. The risk is the same as figure 4.
SD
VDDQ=1.8V
AVIN=1.8V or 5.5V
PVIN=1.8V
CIN +
SD
VDDQ
AVIN
PVIN
VREF
VSENSE
VTT
GND
+
VREF=0.9V
CREF
VTT=0.9V
+
COUT
Figure 5. Recommended DDR-II Termination
SD
VDDQ=1.8V
AVIN=3.3V or 5.5V
PVIN=3.3V
CIN +
SD
VDDQ
AVIN
PVIN
VREF
VSENSE
VTT
GND
+
VREF=0.9V
CREF
VTT=0.9V
+
COUT
Figure 6. DDR-II Termination with higher voltage rails
Figure 7 & 8 are used to scale the VTT to the wanted
value when the standard voltages of SSTL-2 do not
meet the requirements. Using R1 & R2, figure 7 can
shift VTT up to VDDQ/2 * (1+R1/R2) and figure 8 can
shift VTT down to VDDQ/2 * (1-R1/R2).
VDDQ
VDD
CIN +
VDDQ
AVIN
VTT
PVIN
VSENSE
GND
VTT
R1 +
COUT
R2
Figure 7. Increasing VTT by Level Shifting
VDDQ
VDD
R2
VDDQ
VSENSE
R1
AVIN
CIN +
PVIN
VTT
GND
VTT
+
COUT
Figure 8. Decreasing VTT by Level Shifting
Ver: 2.3
May 16, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
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