G2997B Datasheet, PDF (1/1 Pages) Global Mixed-mode Technology Inc – DDR Termination Regulator

Global Mixed-mode Technology
G2997B
DDR Termination Regulator
Features
„ Support DDR I (1.25VTT), DDR II (0.9 VTT),
DDR III (0.75 VTT), and DDR IIIL (0.675VTT)
Requirements
„ Input Voltage Range: 3V to 5.5V
„ VLDOIN Voltage Range: 1.2V to 3.6V
„ Requires Only 20µF Ceramic Output Capaci-
tance
„ Supports High-Z in S3 and Soft-Off in S5
„ Integrated Divider Tracks 1/2 VDDQSNS for
Both VTT and VTTREF
„ Remote Sensing (VTTSNS)
„ ±20mV Accuracy for VTT and VTTREF
„ 10mA Buffered Reference (VTTREF)
„ Built-In Soft-Start
„ Over Current Protection
„ Thermal Shutdown Protection
„ MSOP-10 & MSOP-10 (FD) Package
Applications
„ DDR I/II/III/IIIL Memory Termination
„ SSTL−2, SSTL−18
„ HSTL Termination
General Description
The G2997B is a 2A sink/source tracking termination
regulator. It is specifically designed for low-cost/
low-external component count systems. The G2997B
maintains a high speed operational amplifier that pro-
vides fast load transient response and only requires
20µF (2x10µF) of ceramic output capacitance. The
G2997B supports remote sensing functions and all
features required to power the DDR I / DDR II /DDRIII
/DDR IIIL VTT bus termination according to the
JEDEC specification. In addition, the G2997B includes
integrated sleep-state controls placing VTT in High-Z
in S3 (suspend to RAM) and soft-off for VTT and
VTTREF in S5 (Shutdown). The G2997B is available
in MSOP-10 and MSOP-10 (FD).
Ordering Information
ORDER
NUMBER
MARKING
TEMP.
RANGE
G2997BP71U G2997 -40°C~85°C
G2997BF61U G2997B -40°C~85°C
Note: P7: MSOP-10 F6: MSOP-10 (FD)
1: Bonding Code
U: Tape & Reel
PACKAGE
(Green)
MSOP-10
MSOP-10 (FD)
Pin Configuration
VDDQSNS 1
VLDOIN 2
VTT 3
PGND 4
VTTSNS 5
G2997B
MSOP-10
G2997B
10 _VIN
9 S5
VDDQSNS 1
VLDOIN 2
8 GND
VTT 3
7 S3
PGND 4
6 VTTREF VTTSNS 5
Thermal
Pad
10 _VIN
9 S5
8 GND
7 S3
6 VTTREF
Top View
MSOP-10 (FD)
Note: Recommend connecting the Thermal Pad to
the GND for excellent power dissipation.
Typical Application Circuit
1.8V
C1
2x10µF
DDR II
VDDQSNS VIN
DDR II
VLDOIN
S5
VTT
GND
PGND
S3
VTTSNS VTTREF
R_S5
10kΩ
VIN=5V
S5
R_S3
S3
10kΩ
C2
0.1µF
2.5V
C1
2x10µF
DDR I
VDDQSNS VIN
VLDOIN
S5
VTT
GND
PGND
S3
VTTSNS VTTREF
R_S5
10kΩ
VIN=5V
S5
R_S3
S3
10kΩ
C2
0.1µF
1.5V
C1
2x10µF
DDR III*
VDDQSNS VIN
DDR II
VLDOIN
S5
VTT
GND
PGND
S3
VTTSNS VTTREF
R_S5
10kΩ
VIN=3.3V
S5
R_S3
S3
10kΩ
C2
0.1µF
* Recommended V_IN =3.3V
Ver: 0.8
Nov 22, 2011
TEL: [phone]
http://www.gmt.com.tw
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