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GS1661A Datasheet, PDF (80/85 Pages) Gennum Corporation – Ancillary data extraction
5.3 Typical Application Circuit
Power Decoupling
+1.2V
+1.2V_A
10n
10n
10n
10n
10n
10n
10n
IO_VDD
A_GND
+3.3V_A
10n
10n
10n
10n
10n
10n
10n
Place close to GS1661A
A_GND
Place close to GS1661A
+1.2V_A
R7
105R
C18
33u
SMPTE_BY PASS
DVB_ASI
TIM_861
SW_EN
IOPROC_EN/DIS
20bit/10bit
RC_BY P
JTAG/HOST
STANDBY
RESET_TRST
SDO_EN/DIS
SDOUT_TDO
SDIN_TDI
SCLK_TCK
CS_TMS
Place close to GS1661A
A_GND
DNP
1u
47n
+3.3V_A
R19
DNP
A3 LB_CONT
A1 VBG
A2 LF
B3 RSV
A_GND
TP
16p
H6 XTAL_OUT
J6 XTAL2
16p CS10-27.000M
K6 XTAL1
+1.2V_A
CD_DISABLEb
G7
G8
H5
D7
SMPTE_BY PASS
DVB_ASI
TIM_861
SW_EN
H8
H7
IOPROC_EN/DIS
20bit/10bit
G3 RC_BY P
D8
K2
JTAG/HOST
STANDBY
C7
J2
RESET_TRST
SDO_EN/DIS
E7 SDOUT_TDO
E8 SDIN_TDI
F8
F7
SCLK_TCK
CS_TMS
F2
RSV
+3.3V_A
+1.2V IO_VDD
GS1661A
STAT2 B5
STAT1 A6
STAT0 A5
PCLK A8
DOUT 19 B8
DOUT 18 A9
DOUT 17 A10
DOUT 16 B9
DOUT 15 B10
DOUT 14 C9
DOUT 13 C10
DOUT 12 C8
DOUT 11 E10
DOUT 10 E9
DOUT 9 F10
DOUT 8 F9
DOUT 7 H10
DOUT 6 H9
DOUT 5 J10
DOUT 4 J9
DOUT 3 K10
DOUT 2 K9
DOUT 1 J8
DOUT 0 K8
STAT3 B6
STAT4 C5
STAT5 C6
RSV
RSV
RSV
K4
J4
H4
RSV J3
RSV K3
RSV
RSV
J5
K5
+3.3V
Power Filtering
CD_VDD +1.2V
0R
0R
10n
1u
1u
10n
10n
1u
+1.2V_A
1u
10n
0R
10n
1u
0R
A_GND
+3.3V_A
1u
10n
A_GND
IO_VDD
A_GND
1u
22R
22R
22R
F/DE (DEFAULT, PROGRAMMABLE)
V/VSY NC (DEFAULT, PROGRAMMABLE)
H/HSY NC (DEFAULT, PROGRAMMABLE)
22R
PCLK
DOUT[19:0]
DOUT[19:0]
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
LOCKED (DEFAULT, PROGRAMMABLE)
Y /1ANC (DEFAULT, PROGRAMMABLE)
DATA_ERRORb (DEFAULT, PROGRAMMABLE)
6n2
UCBBJE20-1
1
75R
A_GND
75R
1u
1u
37R4
A_GND
470n
A_GND
F1
470n
G1
AGCP
AGCN
C1 SDI
D1 SDI
A_GND
SDO
SDO
K1
J1 A_GND
Close to
pin 1 & 2
of GS2978
10n
49R9
1 SDI
SDO 12
49R9
2 SDI GS2978-CNE3 SDO 11
3 VEE
SD/HD 10
4
A_GND
RSET
VCC 9
750R
CD_VDD
CD_DISABLEb
10n
A_GND
75-ohm Traces
4u7
75R
75R CD_VDD A_GND
10n
75R
5n6
A_GND
UCBBJE20-1
1
4u7
75R
CD SLEW RATE SELECT
CD_VDD
A_GND
Notes:
1. DNP (Do Not Populate).
2. The value of the series resistors on video data, clock, and timing
connections should be determined by board signal integrity test.
3. For analog power and ground isolation refer to PCB layout guide.
4. For impedance controlled signal layout refer to PCB layout guide.
GS1661A HD/SD SDI Receiver
Data Sheet
54387 - 2
September 2012
80 of 85