GS1672 Datasheet, PDF (72/116 Pages) Gennum Corporation – Integrated Cable Driver

Table 4-26: GS1672 PLL Bandwidth
Mode
SD
SD
HD
HD
PCLK Frequency
(MHz)
13.50
27.00
74.25
148.50
Filter Resistor
(Ω)
200
200
200
200
Charge Pump
Current (μA)
100
100
100
100
Bandwidth
(MHz)
4.78
9.57
26.32
52.63
4.11.2 Lock Detect
The Lock Detect block controls the serial digital output signal and indicates to the
application layer the lock status of the device.
The LOCKED output pin is provided to indicate the device operating status.
The LOCKED output signal is set HIGH by the lock detect block under the following
conditions (see Table 4-27):
Table 4-27: GS1672 Lock Detect Indication
RESET
HIGH
HIGH
HIGH
PLL Lock
HIGH
HIGH
HIGH
SMPTE_BYPASS
HIGH
LOW
LOW
DVB_ASI
LOW
HIGH
LOW
RATE_SEL
X
HIGH
X
Any other combination of signal states not included in the above table results in the
LOCKED pin being LOW.
NOTE: When the LOCKED pin is LOW, the serial digital output is in the muted state.
4.12 Serial Digital Output
The GS1672 has a single, low-impedance current mode differential output driver,
capable of driving at least 800mV into a 75Ω single-ended load.
The output signal amplitude, or swing, will be user-configurable using an external
resistor on the RSET pin.
The serial digital output data rate supports SMPTE 292, SMPTE 259M-C and DVB-ASI
operation. This is summarized in Table 4-28:
GS1672 HD/SD-SDI Serializer with Complete SMPTE
Audio & Video Support
Data Sheet
53623 - 6
July 2011
72 of 116