GP521 Datasheet, PDF (5/8 Pages) Gennum Corporation – General Purpose Controller / Memory Chip for Hearing Instruments

PIN DESCRIPTION
CLOCK - The clock pulses for synchronization of the data
transfer. The clock pulses are provided by the programming
unit.
DATA - The input / output pin allow for serial data transfer
between the GP521 and the programming unit.
V_CC - Recommended supply voltage for GP521 is 1.3V
SWOFF - The logic state of SWOFF determines whether the
GP521 operates at 6 or 8 PCS configuration. When SWOFF is
high, all eight (I_O1 to I_O8) PCS are available (8 PCS
configuration) Figure 10.
CLOCK
1
DATA
2
V_CC
3
SWOFF
4
GND
5
OS1
6
I_o4
7
I_o3
8
17
I_R
16
NC
15
I_o5
14
NC
GP521
13
I_o6
12
I_o7
11
I_o8
10
I_o1
9
I_o2
Fig.10 EIGHT OUTPUT CONFIGURATION
When SWOFF is low, four PCS (I_O5 to I_O8) are available;
availablility of other two PCS is dependent on the voltage on
pin OS1. For this configuration (6 PCS configuration) the
necessary hardware connections are presented in Figure 11.
CLOCK
1
DATA
2
V_CC
3
SWOFF
4
GND
5
OSI
6
I_o4
7
I_o3
8
17
I_R
16
NC
15
I_o5
14
NC
GP521
13
I_o6
12
I_o7
11
I_o8
10
I_o1
9
I_o2
Fig. 11 SIX OUTPUT CONFIGURATION
OS1 - The voltage level on this pin determines the selection
of four PCS (I_O1 to I_O4) for 6 PCS configuration. As indicated
on Figure 11, pin I_O1, I_O2 and I_O3, I_O4 are connected together.
If OS1 is low, I_O1 and I_O3 are set to high impedance. Therefore
the PCS, I_O2 and I_O4 are permitted to sink current.
Similarly if OS1 is high, I_O2 and I_O4 are set as high impedance
points. This allows PCS I_O1 and I_O3 to sink current.
TABLE 1 EFFECTS OF SWOFF AND OS1 INPUTS
SWOFF OS1
01
00
1x
1x
1x
1x
xx
xx
xx
xx
OUTPUT
PCS Register Address
( I_O1 and I_O3)*
( I_O2 and I_O4)*
I_O1
I_O2
I_O3
I_O4
I_O5
I_O6
I_O7
I_O8
(0001000 and 0001010)
(0001001 and 0001011)
0001000
0001001
0001010
0001011
0001100
0001101
0001110
0001110
Note* The complementary outputs are set as high
impedance points.
I_O1 - I_O8 - Each pin is the output of the specific Programmable
Current Sink (PCS). Each PCS consists of four bit EEPROM
memory, Digital to Analog Converter (DAC) and current sink.
The EEPROM stores the four bit information written during
initialization of the system. Four bit memory allows for 16
settings of the current sink. For simplicity, consider the
current sink as a variable resistor. The value of this resistor is
dependent on the DAC setting; DAC is controlled by the binary
value of the RAM memory. To define output current of the
current sink, it is necessary to set the voltage applied to the
PCS output. This voltage is recommended to be 0.5 V. If the
binary value of the EEPROM increases by one, the value of the
output current increases by 0.125 x I_R.
I_R - The reference current delivered from the outside source
(eg. GP520A). This current determines the incremental value
of the programmable current sink for each increase of the
EEPROM address value. The valid addresses run from 0
through to 15. Each step is defined as ∆I = I_R x 0.125,
therefore maximum current at setting 15 is equal to I₁₅ = I_R x
0.125 x 15.
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