GS9021A Datasheet, PDF (4/26 Pages) Gennum Corporation – GENLINX -TM II GS9021A EDH Coprocessor

PIN CONNECTIONS
DIN9
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
V_DD
GND
DIN2
DIN1
DIN0
PCLKIN
P7
P6
P5
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
GS9021A
41
9
TOP VIEW
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17 18 19 20 21 22 23 24 25 26 2728 29 30 31 32
DOUT9
DOUT8
DOUT7
DOUT6
DOUT5
DOUT4
DOUT3
V_DD
GND
DOUT2
DOUT1
DOUT0
FLAG_MAP
F_R/W
FL4
FL3
PIN DESCRIPTIONS
NUMBER
SYMBOL
1-7, 10-12
DIN[9:0]
13
PCLKIN
14-16
P[7:5]
17
SCL/P4
18
SDA/P3
19-21
A[2:0]/P[2:0]
22
R/W
23
A/D
24
CS
25
HOSTIF_MODE
TYPE
I
I
I/O
I/O
I/O
I/O
I
I
I
I
DESCRIPTION
Parallel digital video data inputs.
Parallel clock input.
In parallel port mode, these are bits 7:5 of the host interface address/data bus. In
I²C mode, these pins must be set LOW.
In parallel port mode, this is bit 4 of the host interface address/data bus. In I²C
mode, this is the serial clock input for the I²C port.
In parallel port mode, this is bit 3 of the host interface address/data bus. In I²C
mode, this is the serial data pin for the I²C port.
In parallel port mode, these are bits 2:0 of the host interface address/data bus. In
I²C mode, these are input bits which define the I²C slave address for the device.
Parallel port read/write control. When HIGH, the parallel port is configured as an
output (read mode). When LOW, the parallel port is configured as an input (write
mode). In I²C mode, this pin must be set HIGH.
Parallel port address/data bus control. When HIGH, the parallel port is used for
address input. When LOW, the parallel port is used for data input or output. In
I²C mode, this pin must be set LOW.
Parallel port chip select. When CS is LOW and R/W is HIGH, the GS9021A drives
the address/data bus. When CS is LOW and R/W is LOW, the user should drive
the address/data bus. When CS is HIGH, the address/data bus is in a high
impedance state (Hi - Z). In I²C mode, this pin must be set HIGH.
Host Interface mode select. When HIGH, the host interface is configured for I²C
mode. When LOW, the host interface is configured for parallel port mode.
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