English
Language : 

GS9092A Datasheet, PDF (36/59 Pages) Gennum Corporation – GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
GS9092A Data Sheet
Table 3-4: Host Interface Description for Internal Processing Disable Register
Register Name Bit Name
Description
R/W Default
IOPROC_DISABLE 15-10 –
Not Used
–
–
Address: 00h
9
ANC_PKT_INS
Ancillary Packet Insertion Enable. When the FIFO is
R/W
0
configured for ancillary data insertion, set HIGH to begin
inserting ancillary data.
NOTE: Setting ANC_PKT_INS LOW will not
automatically disable ancillary data insertion (see
Ancillary Data Insertion on page 29).
8-7
FIFO_MODE[1:0] FIFO Mode: These bits control which mode the internal
R/W
0
FIFO is operating in (see Table 3-2)
6
H_CONFIG
Horizontal sync timing output configuration. Set LOW for R/W
0
active line blanking timing. Set HIGH for H blanking
based on the H bit setting of the TRS word. See
Figure 3-8 in HVF Timing Signal Inputs on page 32.
5
352M_CALC
SMPTE 352M Calculation. When set LOW, the GS9092A R/W
–
will automatically generate packet information prior to
insertion. When set HIGH, the user must program the
VIDEO_FORMAT registers with the SMPTE 352M packet
to be inserted.
4
352M_INS
SMPTE 352M Packet Insertion. The IOPROC_EN pin
R/W
–
and SMPTE_BYPASS pin must also be set HIGH. Set
HIGH to disable.
NOTE: The user should disable Packet Insertion when
serializing SDTI signals.
3
ILLEGAL_REMAP Illegal code re-mapping. Detection and correction of
R/W
0
illegal code words within the active picture area. The
IOPROC_EN pin and SMPTE_BYPASS pin must also be
set HIGH. Set HIGH to disable.
2
EDH_CRC_INS
Error Detection & Handling (EDH) Cyclical Redundancy
R/W
0
Check (CRC) error insertion. The GS9092A will generate
and insert EDH packets. The IOPROC_EN pin and
SMPTE_BYPASS pin must also be set HIGH. Set HIGH
to disable.
1
ANC_CSUM_INS Ancillary Data Checksum insertion. The IOPROC_EN pin R/W
0
and SMPTE_BYPASS pin must also be set HIGH. Set
HIGH to disable.
0
TRS_INS
Timing Reference Signal Insertion. Occurs only when
R/W
0
IOPROC_EN pin and SMPTE_BYPASS pin is HIGH. Set
HIGH to disable.
34715 - 0 February 2006
36 of 59