GS9062 Datasheet, PDF (28/46 Pages) Gennum Corporation – GS9062 HD-LINX-TM II SD-SDI and DVB-ASI Serializer

GS9062 Data Sheet
3.6.3 Packet Generation and Insertion
In addition to input data blanking and automatic video standards detection, the
GS9062 may also calculate, assemble and insert into the data stream various
types of ancillary data packets and TRS ID words.
These features are only available when the device is set to operated in SMPTE
mode and the IOPROC_EN/DIS pin is set HIGH. Individual insertion features may
be enabled or disabled via the IOPROC_DISABLE register (Table 3-5).
All of the IOPROC_DISABLE register bits default to '0' after device reset, enabling
all of the processing features. To disable any individual error correction feature, the
host interface must set the corresponding bit HIGH in this register.
Table 3-5: Host Interface Description for Internal Processing Disable Register
Register Name Bit Name
Description
IOPROC_DISABLE
Address: 00h
15-9
8
Not Used
H_CONFIG
7 Not Used
6 352M_INS
5 ILLEGAL_REMAP
4 EDH_CRC_INS
3 ANC_CSUM_INS
2-1 Not Used
0 TRS_INS
Horizontal sync timing input configuration. Set LOW when
the H input timing is based on active line blanking (default).
Set HIGH when the H input timing is based on the H bit of
the TRS words. See Figure 3-2.
SMPTE352M packet insertion. The IOPROC_EN/DIS pin
and SMPTE_BYPASS pin must also be set HIGH. Set HIGH
to disable.
Illegal Code Remapping. Detection and correction of illegal
code words within the active picture area (AP). The
IOPROC_EN/DIS pin and SMPTE_BYPASS pin must also
be set HIGH. Set HIGH to disable.
Error Detection & Handling (EDH) Cyclical Redundancy
Check (CRC) error correction. The IOPROC_EN/DIS pin
and SMPTE_BYPASS pin must also be set HIGH. Set HIGH
to disable.
Ancillary Data Checksum insertion. The IOPROC_EN/DIS
pin and SMPTE_BYPASS pin must also be set HIGH. Set
HIGH to disable.
Timing Reference Signal Insertion. Occurs only when
IOPROC_EN/DIS is HIGH and SMPTE_BYPASS is HIGH.
Set HIGH to disable.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
22209 - 5 May 2005
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