GS1503B Datasheet, PDF (28/90 Pages) Gennum Corporation – HD Embedded Audio CODEC Data Sheet

4.6.2 Digital Audio Input Timing
4.6.2.1 AES/EBU Format Input
A 6.144MHz (128fs) audio clock must be supplied to the ACLKA and ACLKB inputs.
ACLKA is used to clock the AES/EBU digital audio signal for channels 1 to 4 (AIN1/2 and
AIN3/4) into the device. ACLKB is used to clock the AES/EBU digital audio signal for
channels 5 to 8 (AIN5/6 and AIN7/8) into the device. In AES/EBU input mode, the
WCINB and WCINB external pins should be grounded. See Figure 4-12 for timing.
Y/Cb / Cr [19:0]
Audio Channels 1 & 2
Audio Channels 3 & 4
6.144MHz (128 fs)
Audio Channels 5 & 6
Audio Channels 7 & 8
6.144MHz (128 fs)
GS1503B
VIN[19:0]
AIN1/2
AIN3/4
ACLKA
WCINA
AIN5/6
AIN7/8
ACLKB
WCINB
ACLKA/B
6.144MHz
AIN1/2, AIN3/4
AIN5/6, AIN7/8
Figure 4-12: AES/EBU Input Configuration and Timing
GS1503B HD Embedded Audio CODEC
Data Sheet
37953 - 1
December 2009
28 of 90