GL424 Datasheet, PDF (21/34 Pages) GENESYS LOGIC – SD/MMC Flash Card Controller

GL424 SD/MMC Flash Card Controller
44
HDATA6
B
MMC mode: HDATA6 from/to HOST.
45
HDATA7
B
MMC mode: HDATA7 from/to HOST.
3.2.3 Flash Interface
Table 3.8 - 46 PIN LQFN Flash Interface
Pin No.
11
12
14
13
46
45
44
15
33
34
35
36
38
41
42
43
Pin Name
CE0_
CE1_
CLE
ALE
RE_
WE_
BUSY_
WP_
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
Type
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
Description
‘0’ for FLASH chip 0 to select active (low-active).
‘0’ for FLASH chip 1 to select active (low-active).
FLASH command latch enable
FLASH address latch enable
FLASH read enable (low active)
FLASH write enable (low active)
FLASH ready when high, busy when low.
FLASH write protect (low active)
FLASH bus bit0
FLASH bus bit1
FLASH bus bit2
FLASH bus bit3
FLASH bus bit4
FLASH bus bit5
FLASH bus bit6
FLASH bus bit7
Pin No.
B6
C5
C6
D5
D6
E6
Table 3.9 - 54 PIN VFBGA Flash Interface
Pin Name
CE0_
CE1_
ALE
CLE
RE_
WE_
Type
B
B
B
B
B
B
Description
‘0’ for FLASH chip 0 to select active (low-active).
‘0’ for FLASH chip 1 to select active (low-active).
FLASH address latch enable
FLASH command latch enable
FLASH read enable (low active)
FLASH write enable (low active)
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