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GA50JT17-CAL Datasheet, PDF (5/8 Pages) GeneSiC Semiconductor, Inc. – Normally – OFF Silicon Carbide Junction Transistor
GA50JT17-CAL
Section V: Gate Drive Theory of Operation
The SJT transistor is a current controlled transistor which requires a positive gate current for turn-on as well as to remain in on-state. An ideal
gate current waveform for ultra-fast switching of the SJT, while maintaining low gate drive losses, is shown in Figure 11.
Figure 11: Idealized Gate Current Waveform
Gate Currents, IG,pk/-IG,pk and Voltages during Turn-On and Turn-Off
An SJT is rapidly switched from its blocking state to on-state, when the necessary gate charge, QG, for turn-on is supplied by a burst of high
gate current, IG,on, until the gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged.
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The IG,pon pulse should ideally terminate, when the drain voltage falls to its on-state value, in order to avoid unnecessary drive losses during
the steady on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in the package and drive circuit. A
voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source junction, when high drain currents begin
to flow through the device. The applied gate voltage should be maintained high enough, above the VGS,ON level to counter these effects.
A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from
the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in
order to speed up the turn-off transition.
Steady On-State
After the device is turned on, IG may be advantageously lowered to IG,steady for reducing unnecessary gate drive losses. The IG,steady is
determined by noting the DC current gain, hFE, of the device
The desired IG,steady is determined by the peak device junction temperature TJ during operation, drain current ID, DC current gain hFE, and a
50 % safety margin to ensure operating the device in the saturation region with low on-state voltage drop by the equation:
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1.5
Aug 2014
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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