GPEV6-3V3-40 Datasheet, PDF (5/8 Pages) Galaxy Power, Inc. – Gemini Series DC/DC Converter Powers ≥600MHz Microprocessors

Control Signals
Application Notes
Control Signal Characteristics: Per Table on Page 4.
Enable_H: This input signal is used to enable the output of the
converter when activated (active High). The signal is referenced to
either the output side (-Sense) or GND. It has an internal pull-up
resistor. To disable the converter requires an open collector logic
signal to pull it down.
4 Bit Logic Signals: The state of the 4 bit control signals controls
the output voltage. Normally, the 4 bits are in a ‘low state’ and
provide for a 2.5V output voltage. The output voltage may be
programmed between 1.429 to 2.5V by setting appropriate logic
bits ‘high’ through D0, D1, D2, and D3.
Powergood_H: The Powergood signal is in a ‘high’ state when the
output voltage is within +/- 7.5% of the output voltage programmed
by the 4 logic bit inputs.
OVPFault_H: This signal is in a ‘high’ state when the output
voltage is greater than +/-15% of the output voltage programmed by
the 4 bit logic inputs or exceeds the maximum operating
temperature of the converter. This output is the open emitter of a
transistor which pulls to +5V in the high state and is open in the
low state. For driving logic, an appropriate pull down resistor from
OVPFault_H to – Sense is required. The OVPFault_H is asserted
high when OVPFault is activated. When driving an SCR to ‘crow-
bar’ the input source from a Fault_H signal, use the circuit below:
+5V
Fault_H
2N2222
100Ω
SCR
1K
0.µ1F
Trim: The output voltage may be lowered from the nominal
programmed value by adding an external resistor from the TRIM
pin (J1-10) to – Sense (J1-1). This is used to obtain output voltages
between the programmed values. The maximum value the output
may be trimmed is approximately –4.5% of Vprog. The resistor
value may be calculated from the following formula:
(2490) (Vtrim)
Rext = ––––––––––––––––––– - 15000
(3.49) (Vprog – Vtrim)
Vtrim = Desired output voltage with Rext tied from TRIM pin to
– SENSE.
Vprog = Nominal programmed output voltage
Notes: 1. Vtrim must be less than Vprog.
2. The trim pin does not change the OVP or Powergood_H trip
points. These are set by the 4 bit logic inputs
Enable Circuit Turn On Time
OFF >3V
ON ≤0.6V
To V_ENABLE Pin
ON/OFF
Gate Drive
Voltage
220K
2N7000
or
Equivalent
To (–)
Output Load Conditions (Turn On)
20 (330µF)
C=6600µF
3.37-5.25V
Input
Output
C=(20)470µF
Tantalum Capacitors
9400µF
+
R_LOAD=40A
Turn On Time
4.5V
Gate Drive
Voltage
0.8V
Falltime <1µsec
TURN_ON
90%
VOUT
10%
5.0V
J1-J7
PowerGood_H
(Volt)
Gemini Series, Page 5
Time
VO
Trise
Time
VO
PowerGood_H
Time
10V
J1–J10
Trim Pin
0V
Vnom
VOUT
J1-J9
OVPfault_H
0
WWW.GALAXYPWR.COM
2.5V
10V
Time
2.5V
V_nom
tOVP
Time
OVPfault_H
5.0V
Time
Part No. 98–004 Rev. 1.0