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MB9BF104NPMC-G-JNE1 Datasheet, PDF (85/100 Pages) Fujitsu Component Limited. – FM3 MB9B100 Series
MB9B100 Series
 12bit A/D Converter
This chapter shows the electrical characteristics for the A/D converter.
1. Electrical characteristics for the A/D converter.
Parameter
Pin
name
(Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V Ta = - 40C to + 85C)
Min
Value
Typ
Max Unit
Remarks
Resolution
-
-
-
12
bit
Linearity error
-
- 4.5
-
+ 4.5 LSB
Differential linearity
error
-
-2.5
-
+ 2.5 LSB
Zero transition voltage
AN0
to AN15
- 20
-
+ 20
mV AVRH = 2.7V to 5.5V
Full transition voltage
AN0
to AN15
- 20
-
+ 20 mV
Conversion time
-
1.0 (*1)
-
-
μs AVcc  4.5V
Sampling time
Ts
*2
*2
-
-
-
-
ns
AVcc  4.5V
AVcc < 4.5V
Compare clock cycle *3 Tcck
55.5
166.7
-
10000
ns
AVcc  4.5V
AVcc < 4.5V
State transition time to
operation permission
Tstt
2.5
-
-
μs
Power supply current
(analog + digital)
AVCC
-
-
2.3
0.1
3.6
mA A/D 1unit operation
2
μA When XSTB is 0 (3unit)
Reference power supply
current
(between AVRH to
AVSS)
AVRH
-
-
2.2
0.03
3.0
mA
A/D 1unit operation
AVRH=5.5V
0.6
μA When XSTB is 0 (3unit)
Analog input capacity
Cin
-
-
14.5
pF
Analog input resistance Rin
-
-
0.93
2.04
kΩ
AVcc  4.5V
AVcc < 4.5V
Interchannel disparity
-
-
-
4
LSB
Analog port input
current
AN0
to AN15
-
-
5
μA
Analog input voltage
AN0
to AN15
AVSS
-
AVRH V
Reference voltage
AVRH AVSS
-
AVCC V
*1: Conversion time is the value of sampling time(Ts) + compare time(Tc).
The condition of the minimum conversion time is when HCLK=72MHz, the value of sampling time: 0.222μs,
the value of sampling time: 778ns (AVcc  4.5V)
Ensure that it satisfies the value of sampling time(Ts) and compare clock cycle (Tcck).
For setting of sampling time and compare clock cycle, see chapter "12-bit A/D Converter" in "Peripheral
Manual".
*2: A necessary sampling time changes by external impedance.
Ensure that it set the sampling time to satisfy (Equation 1)
*3: Compare time (Tc) is the value of (Equation 2)
DS706-00007-1v0-E
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