MB96300 Datasheet, PDF (7/159 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller

Preliminary Specification
MB96300
Features
USART
I2C
A/D Converter
A/D Converter
Reference
Voltage switch
16-bit Reload
Timer
16-bit Free-
Running Timer
16-bit Output
Compare
16-bit Input
Capture
16-bit
Programmable
Pulse Generator
MB96V300
MB9632x
MB9634x
MB9635x
MB9636x
MB9638x
10 channels
4 channels
MB96F348H/
T:
4 channels
others:
7 channels
4 channels
2 channels
5 channels
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
2 channels
1 channel
2 channel
1 channel
1 channel
Master and Slave functionality, 8-bit and 10-bit addressing
40 channels 18 channels 24 channels 15 channels
16 channels
SAR-type, 10bit resolution, signals interrupt on conversion end, single conversion mode, continuous
conversion mode, stop conversion mode, activation by software, external trigger or reload timer
yes
no
yes
no
MB96384R/Y,
MB96385R/Y:
no
no
others:
yes
6 channels
4 channels
4 channels
4 channels
3 channels
4 channels
Prescaler with 1/2¹, 1/2², 1/2³, 1/2⁴, 1/2⁵, 1/2⁶ of peripheral clock frequency, event count function
4 channels
4 channels
2 channels
2 channels
1 channel
2 channels
Signals an interrupt on overflow, supports timer clear upon match with Output Compare (0, 4), Prescaler
with 1/2², 1/2⁴, 1/2⁶, 1/2⁸ of peripheral clockfrequency
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
I/O Timer 2 (clock input FRCK2) corresponds to ICU 8/9
I/O Timer 3 (clock input FRCK3) corresponds to ICU 10/11
12 channels
6 channels
8 channels
4 channels
4 channels
Signals an interrupt when a match with 16-bit I/O Timer
A pair of compare registers can be used to generate an output signal.
12 channels 12 channels
8 channels
6 channels
4 channels
8 channels
Signals an interrupt upon external event
Rising edge, falling edge or rising & falling edge sensitive
20 channels 20 channels 16 channels 20 channels
8 channels
16 bit down counter, cycle and duty setting registers
Interrupt at triggering, cycle or duty match
PWM operation and one-shot operation
Internal prescaler allows 1/2, 1/4, 1/8, 1/16 of peripheral clock as counter clock and Reload timer
overflow as clock input
Can be triggered by software or reload timer
Synchronous trigger of up to 4 PPG channels
FME/EMDC- 2007-02-12
MB96300_shortspec.fm 7