MB90F439 Datasheet, PDF (5/58 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller

MB90435 Series
(Continued)
Features
MB90F438L (S) /F439 (S)
MB90437L (S) *¹
/438L (S) /439 (S)
MB90V540G
16-bit Reload Timer
(2 channels)
Operation clock frequency : fsys/2¹, fsys/2³, fsys/2⁵ (fsys = System clock frequency)
Supports External Event Count function
Signals an interrupt when overflow
16-bit I/O Timer
Supports Timer Clear when a match with Output Compare (Channel 0)
Operation clock freq. : fsys/2², fsys/2⁴, fsys/2⁶, fsys/2⁸ (fsys = System clock freq.)
16-bit Output Compare
(4 channels)
Signals an interrupt when a match with 16-bit I/O Timer
Four 16-bit compare registers
A pair of compare registers can be used to generate an output signal
16-bit Input Capture
(8 channels)
Rising edge, falling edge or rising & falling edge sensitive
Four 16-bit Capture registers
Signals an interrupt upon external event
8/16-bit
Programmable
Pulse Generator
(4 channels)
Supports 8-bit and 16-bit operation modes
Eight 8-bit reload counters
Eight 8-bit reload registers for L pulse width
Eight 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit
prescaler plus 8-bit reload counter
4 output pins
Operation clock freq. : fsys, fsys/2¹, fsys/2², fsys/2³, fsys/2⁴ or 128 µs@fosc = 4 MHz
(fsys = System clock frequency, fosc = Oscillation clock frequency)
32 kHz Sub-clock
Sub-clock for low power operation
External Interrupt
(8 channels)
Can be programmed edge sensitive or level sensitive
External bus
interface
External access using the selectable 8-bit or 16-bit bus is enabled
(external bus mode.)
I/O Ports
Virtually all external pins can be used as general purpose I/O
All push-pull outputs and schmitt trigger inputs
Bit-wise programmable as input/output or peripheral signal
Flash Memory
Supports automatic programming, Embeded Algorithm TM^*4
Write/Erase/Erase-Suspend/Erase-Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 10 years
Boot block configuration
Erase can be performed on each block
Block protection by externally programmed voltage
*1 : Under development
*2 : If the one clock system is used, equip X0A and X1A with clocks from the tool side.
*3 : It is setting of DIP switch S2 when Emulator pod (MB2145-507) is used.Please refer to the MB2145-507 hardware
manual (2.7 Emulator-specific Power Pin) about details.
*4 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
*5 : OPERATING VOLTAGE RANGE
Products
Operation guarantee range
MB90F439 (S) /439 (S) /V540G
4.5 V to 5.5 V
MB90F438L (S) /437L (S) /438L (S)
3.5 V to 5.5 V
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