MB40C950V Datasheet, PDF (4/17 Pages) Fujitsu Component Limited. – 85 MSPS 3ch 10-bit D/A Converter

MB40C950V
s PIN DESCRIPTION
Pin No.
LQFP64
QFP64
4 to 13
15 to 24
29 to 38
5 to 14
18 to 27
29 to 38
42
45
43
46
44
47
61
62
Symbol
R0 to R9
G0 to G9
B0 to B9
RCLK
GCLK
BCLK
CE
62
54, 60
40
56, 58
63
51
48
64
53
49
41
1
52
47
59
57
55
2 to 3
14
25 to 28
39, 45
46, 50
63
55, 61
43
57, 59
64
52
50
1
54
51
44
2
53
49
60
58
56
3 to 4
15 to 17
28
39 to 42
48
DVDD
AVDD
DVSS
AVSS
RVRIN
GVRIN
BVRIN
RIREF
GIREF
BIREF
VA
RVB
GVB
BVB
ROUT
GOUT
BOUT
N.C.
I/O
Description
I Data signal incoming terminal for Rch, Gch and Bch
LSB: R0, G0, B0 MSB: R9, G9,B9
I Clock signal incoming terminal for Rch, Gch and Bch
I Power saving signal incoming terminal. Power saving
enabled for High
— Digital power supply terminal
— Analog power supply terminal
— Digital ground terminal
— Analog ground terminal
I Rererence voltage incoming terminal for Rch, Gch and
Bch
— Reference resistor connection terminal for Rch, Gch and
Bch
— Connect >0.1 µF capacitor to the AVSS terminal
— Connect >0.1 µF capacitor to the AVDD terminal
O Analog signal output terminals for Rch, Gch and Bch
— Not connected. To be left open.
4