MB90570C Datasheet, PDF (39/120 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller

MB90570A/570C Series
2. Timebase Timer
The timebase timer is a 18-bit free run counter (timebase counter) for counting up in synchronization to the
internal count clock (divided-by-2 of oscillation) with an interval timer function for selecting an interval time from
four types of 2¹²/HCLK, 2¹⁴/HCLK, 2¹⁶/HCLK, and 2¹⁹/HCLK.
The timebase timer also has a function for supplying operating clocks for the timer output for the oscillation
stabilization time or the watchdog timer etc.
(1) Register Configuration
• Timebase timer control register (TBTC)
Address
0000A9H
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 bit 7 ^{. . . . . . . . . . . .}bit 0
RESV —
— TBIE TBOF TBR TBC1 TBC0
(WDTC)
——
— R/W R/W W R/W R/W
Initial value
1--00100B
R/W:Readable and writable
W:Write only
—:Unused
RESV: Reserved bit
(2) Block Diagram
To 8/16-bit PPG timer
Timebase timer counter
To watchdog timer
Divided-by-2
of HCLK
× 2¹ × 2² × 2^{3 . . . . . .} × 2⁸ × 2⁹ × 2¹⁰ × 2¹¹ × 2¹² × 2¹³ × 2¹⁴ × 2¹⁵ × 2¹⁶ × 2¹⁷ × 2¹⁸
OF
OF
OF
OF
To oscillation stabilization
time selector of clock control block
Power-on reset
Start stop mode
CKSCR: MCS = 1→0*¹
Counter
clear circuit
Interval
timer selector
Clear TBOF
Set TBOF
Timebase timer control register
(TBTC)
Timebase timer
interrupt signal
#34*²
RESV — — TBIE TBOF TBR TBC1 TBC0
OF: Overflow
HCLK: Oscillation clock
*1: Switch machine clock from oscillation clock to PLL clock
*2: Interrupt signal
DS07-13701-9E
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