MB90497G Datasheet, PDF (31/92 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller

• Pin Block Diagram for Port 0 (single chip mode)
MB90495G Series
PDR (port data register)
PDR read
Output latch
PDR write
DDR (port direction register)
Direction
latch
DDR write
DDR read
Pch
Pin
Nch
Standby control (SPL = 1)
Standby control : control stop mode (SPL = 1) , time-base timer mode (SPL = 1) and watch mode (SPL = 1)
• Port 0 register (single chip mode)
• The port 0 register contains the port 0 data register (PDR0) and the port 0 direction register (DDR0) .
• The bits making up the register are in a one-to-one relation to the port 0 pin.
Compatibility between port 0 register and pin
Port Name
Related register bit and corresponding pin
Port 0
PDR0, DDR0
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Corresponding pin P07 P06 P05 P04 P03 P02 P01 P00
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