MB3889 Datasheet, PDF (22/35 Pages) Fujitsu Component Limited. – 2-Channel DC/DC Converter IC with Overcurrent Protection Symmetrical-Phase Type

MB3889
3. Setting Overvoltage Detection by the Timer-Latch Overvoltage Protection Circuit
An overvoltage output from the DC-DC converter can be detected by connecting external resistors from the DC-
DC converter output to the noninverted input terminal (-INE1 terminal (pin 1) and -INE2 terminal (pin 15)) of the
overvoltage comparators (OVP Comp. 1 and 2).
When the DC-DC converter output voltage exceeds the overvoltage detection level, the output of the overvoltage
comparator (OVP Comp. 1, 2) becomes the “H” level and the overvoltage protection circuit actuates the timer
circuit to start charging the external capacitor Cscp connected to the CSCP terminal (pin 11). If the overvoltage
remains applied beyond setting time, the circuit sets the latch to turn off the FET on the main side of each channel
while setting the PWRGOOD terminal (pin 12) to the “L” level. The protection circuit closes both channels even
when an overvoltage is detected on only either.
Note that the time from the actuation of the timer circuit until the latch is set is equal to the short-circuit detection
time defined in “2. Setting Time Constant for Timer-Latch Short-Circuit Protection Circuit”.
Overvoltage detection voltage : VOVP
VOVP (V) =: 1.38 × (R1 (Ω) + R2 (Ω) ) / R2 (Ω) =: 1.12 × VO
To reset the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal
(pin 6) to the "L" level to lower the VREF terminal (pin 8) voltage to 1.7 V (Min) or less. It can also be reset by
setting both of the CTL1 terminal (pin 9) and CTL2 terminal (pin 10) to the "L" level.
VO
(−INE2)
R1
15
1
−INE1
R2
Error
− Amp
+
1.23 V
OVP
+ ^Comp.
−
1.38 V
10 µA
CSCP
11
CTL
CTL1
CTL2
SR
Latch
Latch2
VREF
UVLO
PWRGOOD
12
<Timer-latch overvoltage protection circuit>
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