MB3821 Datasheet, PDF (16/24 Pages) Fujitsu Component Limited. – 2-ch DC/DC Converter IC With Synchronous Rectifier

MB3821
s METHOD OF SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT
PROTECTION CIRCUIT
The short detection comparator (SCP comparator) constantly compares the error amplifier output level to the
reference voltage.
While the switching regulator load conditions are stable on all channels, the short detection comparator output
remains at “H” level, transistor Q1 is on, and the CSCP terminal (pin 22) is held at input standby voltage (VSTB=: 50mV).
If the load conditions change rapidly due to a short-circuiting of load, causing the output voltage to drop, the output
from the short detection comparator goes to “L” level. This causes transistor Q1 to turn off and the external short
protection capacitor CSCP connected to the CSCP pin to charge at 1.0 µA.
Short Detection Time
tSCP(sec) =: 0.7 × CSCP (µF)
When the capacitor CSCP is charged to the threshold voltage VTH =: 0.7 V, the SR latch is set, and the external FET
is turned off (inactive interval is set to 100%). At this point, the SR latch input is closed and the CSCP terminal is
held at input latch voltage (VI =: 50 mV).
Timer-latch short-circuit protection circuit
1 µA
1 µA
FB1 6
−IN1 5
4
CS1
Cs1
Error
− ^Amp.1
+
+
1.26 V
Q2
Output stage
8
OUT1−1
Output stage
11
OUT2−1
FB2 19
−IN2 20
21
CS2
Cs2
Q3
CSCP
22
1 µA
CSCP
Q1
Q4
Error
− ^Amp.2
+
+
1.26 V
SCP Comp.
bias
S
R
Latch
2.1 V
UVLO
Output stage
17
OUT1−2
Output stage
14
OUT2−2
bias
Ref
Power
(2.5V) ^ON/OFF
18
CTL
16