MB91133 Datasheet, PDF (15/123 Pages) Fujitsu Component Limited. – 32-Bit RISC Microcontroller

MB91133/MB91F133
Pin No.
96
95
94
93
118
119
120
121
122
123
124
125
126
127
128
129
Pin name
SCK3/PJ2
SIN4/PJ3
SOT4/PJ4
SCK4/PJ5
AN0/PK0
AN1/PK1
AN2/PK2
AN3/PK3
AN4/PK4
AN5/PK5
AN6/PK6
CMP/AN7/PK7
DREQ0/PL0
DACK0/PL1
DEOP0/PL2
DREQ1/PL3
Circuit
type
P
P
P
P
Function
UART3 clock input/output
This function is valid when UART3 clock output specification is per-
mitted. Can be used as a port when UART3 clock output specifi-
cation is prohibited.
UART4 data input
This input is always used when UART4 activates input, so output
by ports should be stopped except when carried out intentionally.
Can be used as a port when UART4 data input is not used.
UART4 data output
This function is valid when UART4 data output specification is per-
mitted. Can be used as a port when UART4 data output specifica-
tion is prohibited.
UART4 clock input/output
This function is valid when UART4 clock output specification is per-
mitted. Can be used as a port when UART4 clock output specifi-
cation is prohibited.
A/D converter analog input
This is valid when the AICK register specification is analog input.
N
[ CMP ] level comparator input
Can be used as ports when A/D converter analog input is not used.
DMA external transfer request input
This input is always used if selected as the transfer factor for the
F DMA controller, so output by ports should be stopped except when
carried out intentionally. Can be used as a port when DMA exter-
nal transfer request input is not used.
DMA external transfer request reception output
This function is valid when external transfer request reception out-
F put specification of the DMA controller is permitted. Can be used
as a port when transfer request reception output specification of
the DMA controller is prohibited.
DMA external transfer termination output
F This function is valid when external transfer termination output
specification of the DMA controller is permitted.
DMA external transfer request input
This input is always used if selected as the transfer factor for the
F DMA controller, so output by ports should be stopped except when
carried out intentionally. Can be used as a port when DMA exter-
nal transfer request input is not used.
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