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MB90867E Datasheet, PDF (11/67 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller CMOS
MB90860E Series
Pin No.
QFP100*1 LQFP100*2
9
7
10
8
11
9
12
10
13, 14
11, 12
15
13
16
14
17
15
18
16
Pin name
P34
HRQ
OUT4
P35
HAK
OUT5
P36
RDY
OUT6
P37
CLK
OUT7
P40, P41
X0A , X1A
VCC
VSS
C
P42
IN6
INT9R
I/O
Circuit
type*3
Function
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the hold function disabled.
G Hold request input pin. This function is enabled when both the
external bus and the hold function are enabled.
Waveform output pin for output compare 4.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the hold function disabled.
G Hold acknowledge output pin. This function is enabled when
both the external bus and the hold function are enabled.
Waveform output pin for output compare 5.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the external ready function disabled.
G External ready input pin. This function is enabled when both the
external bus and the external ready function are enabled.
Waveform output pin for output compare 6.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the clock output disabled.
G Clock output pin. This function is enabled when both the
external bus and clock output are enabled.
Waveform output pin for output compare 7.
F
General purpose I/O pins.
(devices with S-suffix)
B
Input pins for sub-clock
(devices without S-suffix)
⎯ Power (3.5 V to 5.5 V) input pin
⎯ GND pin
This is the power supply stabilization capacitor pin. It should be
K connected to a higher than or equal to 0.1 µF ceramic
capacitor.
General purpose I/O pin.
F Trigger input pin for input capture 6.
External interrupt request input pin (sub)
(Continued)
11