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MB90583B Datasheet, PDF (107/124 Pages) Fujitsu Component Limited. – 16-bit Proprietary Microcontroller | |||
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MB90580B Series
Table 7 Transfer Instructions (Byte) [41 Instructions]
Mnemonic
#
~ RG B
Operation
LH AH I S T N Z V C RMW
MOV A, dir
2 30
MOV A, addr16
3 40
MOV A, Ri
1 21
MOV A, ear
2 21
MOV A, eam
2+ 3+ (a) 0
MOV A, io
2 30
MOV A, #imm8
2 20
MOV A, @A
2 30
MOV A, @RLi+disp8 3 10 2
MOVN A, #imm4
1 10
(b) byte (A) â (dir)
Z*âââ* *ââ â
(b) byte (A) â (addr16) Z * â â â * * â â â
0 byte (A) â (Ri)
Z*âââ* *ââ â
0 byte (A) â (ear)
Z*âââ* *ââ â
(b) byte (A) â (eam)
Z*âââ* *ââ â
(b) byte (A) â (io)
Z*âââ* *ââ â
0 byte (A) â imm8
Z*âââ* *ââ â
(b) byte (A) â ((A))
Zââââ * * ââ â
(b) byte (A) â ((RLi)+disp8) Z * â â â * * â â â
0 byte (A) â imm4
Z * âââR* ââ â
MOVX A, dir
2 30
MOVX A, addr16
3 40
MOVX A, Ri
2 21
MOVX A, ear
2 21
MOVX A, eam
2+ 3+ (a) 0
MOVX A, io
2 30
MOVX A, #imm8
2 20
MOVX A, @A
2 30
MOVX A,@RWi+disp8 2 5 1
MOVX A, @RLi+disp8 3 10 2
(b) byte (A) â (dir)
X*âââ* *ââ â
(b) byte (A) â (addr16) X * â â â * * â â â
0 byte (A) â (Ri)
X*âââ* *ââ â
0 byte (A) â (ear)
X*âââ* *ââ â
(b) byte (A) â (eam)
X*âââ* *ââ â
(b) byte (A) â (io)
X*âââ* *ââ â
0 byte (A) â imm8
X*âââ* *ââ â
(b) byte (A) â ((A))
Xââââ * * ââ â
(b) byte (A) â ((RWi)+disp8) X * â â â * * â â â
(b) byte (A) â ((RLi)+disp8) X * â â â * * â â â
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
/MOV
dir, A
2 30
addr16, A
3 40
Ri, A
1 21
ear, A
2 21
eam, A
2+ 3+ (a) 0
io, A
2 30
@RLi+disp8, A 3 10 2
Ri, ear
2 32
Ri, eam
2+ 4+ (a) 1
ear, Ri
2 42
eam, Ri
2+ 5+ (a) 1
Ri, #imm8
2 21
io, #imm8
3 50
dir, #imm8
3 50
ear, #imm8
3 21
eam, #imm8 3+ 4+ (a) 0
@AL, AH
@A, T
2 30
(b) byte (dir) â (A)
âââââ* *ââ â
(b) byte (addr16) â (A) â â â â â * * â â â
0 byte (Ri) â (A)
âââââ* *ââ â
0 byte (ear) â (A)
âââââ* *ââ â
(b) byte (eam) â (A)
âââââ* *ââ â
(b) byte (io) â (A)
âââââ* *ââ â
(b) byte ((RLi) +disp8) â (A) â â â â â * * â â â
0 byte (Ri) â (ear)
âââââ* *ââ â
(b) byte (Ri) â (eam)
âââââ* *ââ â
0 byte (ear) â (Ri)
âââââ* *ââ â
(b) byte (eam) â (Ri)
âââââ* *ââ â
0 byte (Ri) â imm8
âââââ* *ââ â
(b) byte (io) â imm8
âââââââââ â
(b) byte (dir) â imm8
âââââââââ â
0 byte (ear) â imm8
âââââ* *ââ â
(b) byte (eam) â imm8 â â â â â â â â â â
(b) byte ((A)) â (AH)
âââââ* *ââ â
XCH
XCH
XCH
XCH
A, ear
A, eam
Ri, ear
Ri, eam
2 4 2 0 byte (A) â (ear)
2+ 5+ (a) 0 2Ã (b) byte (A) â (eam)
2 7 4 0 byte (Ri) â (ear)
2+ 9+ (a) 2 2Ã (b) byte (Ri) â (eam)
Zââââââââ â
Zââââââââ â
âââââââââ â
âââââââââ â
Note : For an explanation of â(a)â to â(d)â, refer to Table 4, âNumber of Execution Cycles for Each Type of Addressing,â
and Table 5, âCorrection Values for Number of Cycles Used to Calculate Number of Actual Cycles.â
107
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