MB91F109 Datasheet, PDF (102/117 Pages) Fujitsu Component Limited. – 32-bit RISC Microcontroller

MB91F109
4. Detailed Description of Instructions
• Add/subtract operation instructions (10 instructions)
ADD
* ADD
Mnemonic
Rj, Ri
#s5, Ri
Type OP Cycle N Z V C
Operation
A A6
C’ A4
1 C C C C Ri + Rj → Ri
1 C C C C Ri + s5 → Ri
ADD
ADD2
ADDC
#i4, Ri
#i4, Ri
Rj, Ri
ADDN Rj, Ri
* ADDN #s5, Ri
C A4
C A5
A A7
A A2
C’ A0
1 C C C C Ri + extu (i4) → Ri
1 C C C C Ri + extu (i4) → Ri
1 C C C C Ri + Rj + c → Ri
1 – – – – Ri + Rj → Ri
1 – – – – Ri + s5 → Ri
ADDN
ADDN2
SUB
SUBC
#i4, Ri
#i4, Ri
Rj, Ri
Rj, Ri
C A0
C A1
A AC
A AD
1 – – – – Ri + extu (i4) → Ri
1 – – – – Ri + extu (i4) → Ri
1 C C C C Ri – Rj → Ri
1 C C C C Ri – Rj – c → Ri
SUBN Rj, Ri
A AE 1 – – – – Ri – Rj → Ri
• Compare operation instructions (3 instructions)
CMP
* CMP
Mnemonic
Rj, Ri
#s5, Ri
Type OP Cycle N Z V C
Operation
A AA
C’ A8
1 C C C C Ri – Rj
1 C C C C Ri – s5
CMP
#i4, Ri
CMP2 #i4, Ri
C A8
C A9
1 C C C C Ri + extu (i4)
1 C C C C Ri + extu (i4)
• Logical operation instructions (12 instructions)
AND
AND
ANDH
ANDB
OR
OR
ORH
ORB
EOR
EOR
EORH
EORB
Mnemonic
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
Type OP Cycle N Z V C
Operation
A 82 1 C C – – Ri & = Rj
A 84 1 + 2a C C – – (Ri) & = Rj
A 85 1 + 2a C C – – (Ri) & = Rj
A 86 1 + 2a C C – – (Ri) & = Rj
A 92 1 C C – – Ri | = Rj
A 94 1 + 2a C C – – (Ri) | = Rj
A 95 1 + 2a C C – – (Ri) | = Rj
A 96 1 + 2a C C – – (Ri) | = Rj
A 9A 1 C C – – Ri ^ = Rj
A 9C 1 + 2a C C – – (Ri) ^ = Rj
A 9D 1 + 2a C C – – (Ri) ^ = Rj
A 9E 1 + 2a C C – – (Ri) ^ = Rj
Remarks
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
Add operation with
sign
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
Subtract operation with
carry
Remarks
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
Remarks
Word
Word
Half word
Byte
Word
Word
Half word
Byte
Word
Word
Half word
Byte
102