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FA5604 Datasheet, PDF (17/31 Pages) Fuji Electric – FUJI Power Supply Control IC
FA5604/5605/5606
(2)PWM comparator
Fig.6 shows the PWM comparator timing chart. The PWM comparator has three inputs. Oscillator output ○1 is
compared with CS pin voltage ○2 and FB pin voltage ○3 . The lower of two inputs ○2 and ○3 has priority and
compared with oscillator output ○1 . While the voltage is lower than the oscillator output, the PWM comparator
output is high. While the voltage is higher than the oscillator output, the PWM comparator output is low.
The OUT pin of the IC is controlled so that it is H at the bottom of triangular wave oscillation waveforms (Output
MOSFET is ON) and L when the PWM comparator output is set to H (Output MOSFET is OFF).
When the IC is started up, CS pin voltage ○2 controls soft start operation. The output pulse then begins to widen
gradually. During normal operation, the output pulse width is determined within the maximum duty cycle
(FA5604:46%, FA5605/06:70%) set by FB pin voltage ○3 , to stabilize the output voltage.
③FB pin voltage
①Oscillator output
②CS pin voltage
(3.8V)
③FB pin voltage
②CS pin voltage
①Oscilator output
PWM
PWM comparator output
OUT pin voltage
Fig.6
(3)CS pin circuit
The CS pin connects to the capacitor Ccs. The CS pin voltage varies depending on the charging voltage of this
capacitor Ccs (Fig.7).
When the power is turned on, the constant current source (10A) begins to charge capacitor Ccs. Because of that,
the CS terminal voltage gradually increases as shown in Fig.6.The CS pin voltage is connected to the PWM
comparator, which is characterized to make output based on the lowest of input voltages. The device enters
soft-start mode while the CS pin voltage is between 1.0V and 3.0V. During normal operation, the CS pin voltage is
clamped at 3.8V by internal zener diode. If the output voltage drops due to an overload and the VF pin voltage
become 3V or less, the clamp voltage 3.8V is canceled and the CS pin voltage rises. The CS pin voltage is
oscillate between 3.8V and 5.7V, and determined the time ratio of OLP hiccup.
Moreover, the CS pin is connected to latch comparator. If the CS pin voltage rises to 7.3V (50sec) or more,
comparator toggles to turn off, thereby shutting the output down. Since the CS pin is also connected to ON/OFF
comparator, this circuit can be turned off to shut the output down by dropping the CS pin voltage below 0.60V.
In this way, the CS pin can be used for soft-start, overload output shutdown, external latch, ON/OFF control by
varying the voltage (Fig.8).
VF 7
FB 2
OCP
timer
OCP
Ccs
▽
CS
8
VCC
6
0.75 / 0.60V
ON/OFF
▽
Latch
10uA
7.3V ▽
3.8V
▽
PWM
OUT
OSC
1
RT
Fig.7
15
7.3
5.7
VCS(V)
3.8
3.0
1.0
0.75/0.60
0
Overvoltage
(Latch)
Hiccup
(VVF<3V)
3.8V Clamp
(VVF>3V)
Overload
Soft start
OFF Mode
t
Fig.8
Fuji Electric Co., Ltd.
AN-033E Rev.1.2
April-2011
17
http://www.fujielectric.co.jp/products/semiconductor/