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6.4.2 DMA timing
Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.2
Clearance No.: FTDI# 318
DMA timing characteristics (Ambient Temperature = -40°C to +85°C)
Parameter
Description
Min
Max
Unit
T_sudreqdack
DREQ Set-up Time before DACK
Assertion
0
-
ns
T_ddackdreq
DACK De-assertion to Next DREQ
18
-
Assertion Time
ns
T_hdreqdack
DREQ Hold Time after Last Strobe
-
35
Assertion
ns
T_rwp
RD_N/WR_N Pulse Width
40
-
ns
T_oe
Data Valid Time after RD_N Assertion
8
-
ns
T_rdh
Read Data Hold Time after RD_N De-
4
9
ns
asserts
T_wdh
Write Data Hold Time after WR_N De-
0
-
assertion
ns
T_dadvh
Write Data Set-up Time before WR_N
6
De-assertion
-
ns
T_sudackrw
DACK Set-up Time before
RD_N/WR_N Assertion
0
-
ns
T_rwdack
DACK De-assertion after RD_N/WR_N
0
De-assertion
-
ns
T_cyc
DMA Read/Write Cycle Time
80
-
ns
Table 6-13 DMA timing
DREQ
Tsudreqdack
DACK
Trwp
Tcyc
Tsudackrw
RD_N/
WR_N
Toe
DATA[15:0]
(read)
DATA[15:0]
(write)
Trdh
Tdadvh
Twdh
DATA1
DATA2
Thdreqdack
Trwdack
Tddackdreq
DATAn
Figure 6-7 DMA read and write
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