FT232RL-REEL Datasheet, PDF (26/47 Pages) Future Technology Devices International Ltd. – USB UART IC

FT232R USB UART IC Datasheet
Version 2.13
Document No.: FT_000053 Clearance No.: FTDI# 38
iii) One of the CBUS Pins should be configured as PWREN# in the internal FT232R EEPROM, and used
to switch the power supply to the external circuitry. This should be pulled high through a 10 kΩ
resistor.
iv) For USB high-power bus powered applications (one that consumes greater than 100mA, and up
to 500mA of current from the USB bus), the power consumption of the application must be set in
the Max Power field in the internal FT232R EEPROM. A high-power bus powered application uses
the descriptor in the internal FT232R EEPROM to inform the system of its power requirements.
v) PWREN# gets its VCC from VCCIO. For designs using 3V3 logic, ensure VCCIO is not powered
down using the external logic. In this case use the +3V3OUT.
6.4 USB Bus Powered with Selectable External Logic Supply
5
SHIELD
Vcc
Ferrite
1
Bead
2
3
4
10nF ₊
1
2
3
Jumper
GND
Vcc
100nF 4.7uF ₊
GND
VCCIO
100nF
VCC
USBDM
USBDP
VCCIO
NC
RESET#
NC
OSCI
OSCO
TXD
RXD
RTS#
CTS#
FT232R _DTR#
DSR#
DCD#
RI#
CBUS0
CBUS1
3V3OUT
A
T ^CBUS2
GGGGE
N N N N S CBUS3
DDDDT
CBUS4
GND
3.3V or 5V
Supply to
External Logic
100nF
VCCIO
10K
PWREN#
SLEEP#
GND
Figure 6.4 USB Bus Powered with +3.3V or +5V External Logic Power Supply
Figure 6.44 illustrates a USB bus power application with selectable external logic supply. The external
logic can be selected between +3.3V and +5V using the jumper switch. This jumper is used to allow t he
FT232R to be interfaced with a +3.3V or +5V logic devices. The VCCIO pin is either supplied with +5V
from the USB bus (jumper pins1 and 2 connected), or from the +3.3V output from the FT232R 3V3OUT
pin (jumper pins 2 and 3 connected). The supply to VCCIO is also used to supply external logic.
With bus powered applications, the following should be noted:
i)
To comply with the 2.5mA current supply limit during USB suspend mode, PWREN# or
SLEEP# signals should be used to power down external logic in this mode. If this is not
possible, use the configuration shown in Section 6.3.
ii)
The maximum current sourced from the USB bus during normal operation should not exceed
100mA, otherwise a bus powered design with power switching (Section 6.3) should be used.
Another possible configuration could use a discrete low dropout (LDO) regulator which is supplied by the
5V on the USB bus to supply between +1.8V and +2.8V to the VCCIO pin and to the external logic. In
this case VCC would be supplied with the +5V from the USB bus and the VCCIO would be supplied from
the output of the LDO regulator. This results in the FT232R I/O pins driving out at between +1.8V and
+2.8V logic levels.
Copyright © 2015 Future Technology Devices International Limited
26