K50P100M72SF1 Datasheet, PDF (72/79 Pages) Freescale Semiconductor, Inc – K50 Sub-Family

Pinout
104 100
MAP LQFP
BGA
Pin Name
H8 40 PTA1
J7 41 PTA2
H9 42 PTA3
J8 43 PTA4/
LLWU_P3
E5 — VDD
G3 — VSS
K8 44 PTA12
Default
ALT0
JTAG_TDI/ TSI0_CH2
EZP_DI
JTAG_TDO/ TSI0_CH3
TRACE_SWO/
EZP_DO
JTAG_TMS/ TSI0_CH4
SWD_DIO
NMI_b/
TSI0_CH5
EZP_CS_b
VDD
VDD
VSS
VSS
CMP2_IN0 CMP2_IN0
ALT1
PTA1
PTA2
PTA3
PTA4/
LLWU_P3
PTA12
L8 45 PTA13/
LLWU_P4
K9 46 PTA14
CMP2_IN1
DISABLED
CMP2_IN1
PTA13/
LLWU_P4
PTA14
L9 47 PTA15
L10 48 VDD
K10 49 VSS
L11 50 PTA18
K11 51 PTA19
DISABLED
PTA15
VDD
VDD
VSS
VSS
EXTAL0
EXTAL0
PTA18
XTAL0
XTAL0
PTA19
J11 52 RESET_b
G11 53 PTB0/
LLWU_P5
G10 54 PTB1
G9 55 PTB2
G8 56 PTB3
RESET_b
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
ADC0_SE12/
TSI0_CH7
ADC0_SE13/
TSI0_CH8
RESET_b
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
ADC0_SE12/
TSI0_CH7
ADC0_SE13/
TSI0_CH8
PTB0/
LLWU_P5
PTB1
PTB2
PTB3
F11 — PTB6
E11 — PTB7
D11 — PTB8
E10 57 PTB9
D10 58 PTB10
C10 59 PTB11
— 60 VSS
— 61 VDD
ADC1_SE12 ADC1_SE12 PTB6
ADC1_SE13 ADC1_SE13 PTB7
DISABLED
PTB8
DISABLED
PTB9
ADC1_SE14 ADC1_SE14 PTB10
ADC1_SE15 ADC1_SE15 PTB11
VSS
VSS
VDD
VDD
ALT2
ALT3
ALT4
ALT5
UART0_RX FTM0_CH6
UART0_TX FTM0_CH7
UART0_RTS_ FTM0_CH0
b
FTM0_CH1
FTM1_CH0
FTM1_CH1
SPI0_PCS0 UART0_TX
SPI0_SCK UART0_RX
FTM0_FLT2 FTM_CLKIN0
FTM1_FLT0 FTM_CLKIN1
I2C0_SCL FTM1_CH0
I2C0_SDA FTM1_CH1
I2C0_SCL
I2C0_SDA
UART0_RTS_
b
UART0_CTS_
b/
UART0_COL_
b
SPI1_PCS1
SPI1_PCS0
SPI1_SCK
UART3_RTS_
b
UART3_CTS_
b
UART3_RX
UART3_TX
FB_AD23
FB_AD22
FB_AD21
FB_AD20
FB_AD19
FB_AD18
ALT6
ALT7
EzPort
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
I2S0_TXD0
I2S0_TX_FS
I2S0_RX_
BCLK
I2S0_RXD0
FTM1_QD_
PHA
FTM1_QD_
PHB
I2S0_TXD1
LPTMR0_
ALT1
FTM1_QD_
PHA
FTM1_QD_
PHB
FTM0_FLT3
FTM0_FLT0
FTM0_FLT1
FTM0_FLT2
K50 Sub-Family Data Sheet, Rev. 2, 4/2012.
72
Freescale Semiconductor, Inc.