K60P144M120SF3 Datasheet, PDF (71/82 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Data Sheet

Pinout
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to http://www.freescale.com and perform a keyword
search for the drawing’s document number:
If you want the drawing for this package
144-pin LQFP
144-pin MAPBGA
Then use this document number
98ASS23177W
98ASA00222D
8 Pinout
8.1 K60 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQF MAP
P BGA
— L5 RTC_WAKE RTC_WAKE RTC_WAKE
UP_B
UP_B
UP_B
— M5 NC
NC
NC
— A10 NC
NC
NC
— B10 NC
NC
NC
— C10 NC
NC
NC
1 D3 PTE0
ADC1_SE4 ADC1_SE4 PTE0
a
a
SPI1_PCS1 UART1_TX SDHC0_D1
I2C1_SDA RTC_CLKO
UT
2 D2 PTE1/
ADC1_SE5 ADC1_SE5 PTE1/
SPI1_SOUT UART1_RX SDHC0_D0
LLWU_P0 a
a
LLWU_P0
I2C1_SCL SPI1_SIN
3 D1 PTE2/
ADC1_SE6 ADC1_SE6 PTE2/
SPI1_SCK UART1_CT SDHC0_DC
LLWU_P1 a
a
LLWU_P1
S_b
LK
4 E4 PTE3
ADC1_SE7 ADC1_SE7 PTE3
a
a
SPI1_SIN UART1_RT SDHC0_CM
S_b
D
SPI1_SOUT
5 E5 VDD
VDD
VDD
6 F6 VSS
VSS
VSS
7 E3 PTE4/
DISABLED
LLWU_P2
PTE4/
SPI1_PCS0 UART3_TX SDHC0_D3
LLWU_P2
8 E2 PTE5
DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2
FTM3_CH0
K60 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
Freescale Semiconductor, Inc.
Preliminary
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