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K51P121M100SF2V2 Datasheet, PDF (71/77 Pages) Freescale Semiconductor, Inc – K51 Sub-Family
Pinout
121 Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP
BGA
K1 PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
K2 PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
L1 PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
L2 PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
F5 VDDA
VDDA
VDDA
G5 VREFH
VREFH
VREFH
G6 VREFL
VREFL
VREFL
F6 VSSA
VSSA
VSSA
J3 ADC1_SE16/ ADC1_SE16/ ADC1_SE16/
OP1_OUT/ OP1_OUT/ OP1_OUT/
CMP2_IN2/ CMP2_IN2/ CMP2_IN2/
ADC0_SE22/ ADC0_SE22/ ADC0_SE22/
OP0_DP2/ OP0_DP2/ OP0_DP2/
OP1_DP2 OP1_DP2 OP1_DP2
H3 ADC0_SE16/
OP0_OUT/
CMP1_IN2/
ADC0_SE21/
OP0_DP1/
OP1_DP1
ADC0_SE16/
OP0_OUT/
CMP1_IN2/
ADC0_SE21/
OP0_DP1/
OP1_DP1
ADC0_SE16/
OP0_OUT/
CMP1_IN2/
ADC0_SE21/
OP0_DP1/
OP1_DP1
L3 VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
K3 TRI0_OUT/
OP1_DM2
TRI0_OUT/
OP1_DM2
TRI0_OUT/
OP1_DM2
H4 TRI0_DM TRI0_DM TRI0_DM
J4 TRI0_DP
TRI0_DP
TRI0_DP
H5 TRI1_DM TRI1_DM TRI1_DM
J5 TRI1_DP
TRI1_DP
TRI1_DP
H6 TRI1_OUT/
CMP2_IN5/
ADC1_SE22
TRI1_OUT/
CMP2_IN5/
ADC1_SE22
TRI1_OUT/
CMP2_IN5/
ADC1_SE22
K5 DAC0_OUT/
CMP1_IN3/
ADC0_SE23/
OP0_DP4/
OP1_DP4
DAC0_OUT/
CMP1_IN3/
ADC0_SE23/
OP0_DP4/
OP1_DP4
DAC0_OUT/
CMP1_IN3/
ADC0_SE23/
OP0_DP4/
OP1_DP4
K4 DAC1_OUT/
CMP0_IN4/
CMP2_IN3/
DAC1_OUT/
CMP0_IN4/
CMP2_IN3/
DAC1_OUT/
CMP0_IN4/
CMP2_IN3/
K51 Sub-Family Data Sheet, Rev. 1, 6/2012.
Freescale Semiconductor, Inc.
Preliminary
71
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