MC56F8366 Datasheet, PDF (70/184 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Register Acronym
GPIOD_PUR
GPIOD_DR
GPIOD_DDR
GPIOD_PER
GPIOD_IAR
GPIOD_IENR
GPIOD_IPOLR
GPIOD_IPR
GPIOD_IESR
GPIOD_PPMODE
GPIOD_RAWDATA
Table 4-32 GPIOD Registers Address Map
(GPIOD_BASE = $00 F320)
Address Offset
Register Description
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Mode Register
$A
Raw Data Input Register
Reset Value
0 x 1FFF
0 x 0000
0 x 0000
0 x 1FC0
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 1FFF
—
Register Acronym
GPIOE_PUR
GPIOE_DR
GPIOE_DDR
GPIOE_PER
GPIOE_IAR
GPIOE_IENR
GPIOE_IPOLR
GPIOE_IPR
GPIOE_IESR
GPIOE_PPMODE
GPIOE_RAWDATA
Table 4-33 GPIOE Registers Address Map
(GPIOE_BASE = $00 F330)
Address Offset
Register Description
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Mode Register
$A
Raw Data Input Register
Reset Value
0 x 3FFF
0 x 0000
0 x 0000
0 x 3FFF
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 3FFF
—
56F8366 Technical Data, Rev. 2.0
70
Freescale Semiconductor
Preliminary