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MCF51JM128_08 Datasheet, PDF (7/50 Pages) Freescale Semiconductor, Inc – MCF51JM128 ColdFire Microcontroller | |||
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1.3.1 Feature List
MCF51JM128 Family Configurations
⢠32-Bit Version 1 ColdFire® Central Processor Unit (CPU)
â Up to 50.33 MHz at 2.7 V â 5.5 V
â Performance (Dhrystone 2.1):
â 0.94 Dhrystone 2.1 MIPS per MHz when running from internal RAM
â 0.76 Dhrystone 2.1 MIPS per MHz when running from flash
â Implements Instruction Set Revision C (ISA_C)
â Supports up to 30 peripheral interrupt requests and seven software interrupts
⢠On-chip memory
â Up to 128 KBytes Flash memory with read/program/erase over full operating voltage and temperature range
â Up to 16 KBytes static random access memory (RAM)
â Security circuitry to prevent unauthorized access to RAM and flash contents
⢠Power-saving modes
â Two low-power stop plus wait modes
â Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents; this behavior
allows clocks to remain enabled to specific perhipherals in Stop3 mode
â Very lower power real-time counter for use in run, wait, and stop modes with internal and external clock sources
⢠Four Clock Source Options
â Oscillator (XOSC) â Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz
or 1 MHz to 16 MHz
â FLL/PLL controlled by internal or external reference
â Trimmable internal reference allows 0.2% resolution and 2% deviation
⢠System protection features
â Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source
or bus clock
â Low-voltage detection with reset or interrupt; selectable trip points
â Illegal opcode and illegal address detection with programmable reset or exception response
â Flash block protection
⢠Debug support
â Single-wire Background debug interface
â 4 Program Counters plus two address (optional data) breakpoint registers with programmable 1- or 2-level trigger
response
â 64-entry processor status and debug data trace buffer with programmable start/stop conditions
⢠Universal Serial Bus (USB) On-The-Go dual-role controller
â Full-speed USB device controller
â Fully compliant with USB specification 1.1 and 2.0
â 16 bidirectional endpoints, with double buffering to provide the maximum throughput
â Supports control, bulk, interrupt, and isochronous endpoints
â Supports bus-powered capability with low-power consumption
â Full-speed / low-speed host controller
â Host mode allows control, bulk, interrupt, and isochronous transfers
â OTG protocol logic
â On-chip USB transceiver
â On-chip 3.3 V USB regulator and pull-up resistors save system cost
MCF51JM128 ColdFire Microcontroller, Rev. 2
Freescale Semiconductor
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