MC33690 Datasheet, PDF (7/24 Pages) Motorola, Inc – Standalone Tag Reader Circuit

Freescale S^Me^Cm³³i⁶c⁹o⁰nductor, Inc.
VOLTAGE REGULATOR
The low dropout voltage regulator provides a
regulated 5V supply for the internal circuitry. It
can also supply external peripherals or sensors.
The input supply voltage ranges from 5.5V to
over 40V.
This voltage regulator uses a series combination
of high voltage LDMOS and low voltage PMOS
transistors to provide regulation. An external low
ESR capacitor is required for the regulator
stability.
The maximum average current is limited by the
power dissipation capability of the SO 20
package.
This limitation can be overcome by connecting
an external N channel MOS in parallel with the
internal LDMOS. The threshold voltage of this
transistor must be lower than the one of the
internal LDMOS (1.95V typ.) in order to prevent
the current from flowing into the LDMOS. Its
breakdown voltage must be higher than the
maximum supply voltage.
A low voltage reset function monitors the VDD
output. An internal 10µA pull-up current source
allows, when an external capacitor is connected
between LVR and GND, to generate delays at
power up (5ms typ. with C_Reset=22nF) .
The LVR pin is also the input generating the
internal reset signal. Applying a logic low level on
this pin resets the circuit :
- all the internal flip flops are reset,
- the drivers TD1/2 are switched on.
Figure 4 : Voltage regulator block diagram
VBAT
C₁
VSUP
1MHz oscillator
Charge pump
Voltage reference
-
and biasing
VDD
generator
+
C_Reset
10µA
VDD
LVR
reset
Comparator _-
+
GATE
N channel
LDMOS
SOURCE
P channel
MOS
VDD
VDD C₂
C₃
10µF 100nF
© Motorola, Inc., 2002.
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revision 4.8, 5 February 2002