K10P100M100SF2V2 Datasheet, PDF (67/69 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

100 Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQFP
81 PTC9
ADC1_SE5b/ ADC1_SE5b/ PTC9
CMP0_IN3 CMP0_IN3
I2S0_RX_BCLK FB_AD6
FTM2_FLT0
82 PTC10
ADC1_SE6b ADC1_SE6b PTC10
I2C1_SCL
I2S0_RX_FS FB_AD5
83 PTC11/
LLWU_P11
ADC1_SE7b ADC1_SE7b PTC11/
LLWU_P11
I2C1_SDA
I2S0_RXD1 FB_RW_b
84 PTC12
DISABLED
PTC12
UART4_RTS_b
FB_AD27
85 PTC13
DISABLED
PTC13
UART4_CTS_b
FB_AD26
86 PTC14
DISABLED
PTC14
UART4_RX
FB_AD25
87 PTC15
DISABLED
PTC15
UART4_TX
FB_AD24
88 VSS
VSS
VSS
89 VDD
VDD
VDD
90 PTC16
DISABLED
PTC16
CAN1_RX UART3_RX
FB_CS5_b/
FB_TSIZ1/
FB_BE23_16_b
91 PTC17
DISABLED
PTC17
CAN1_TX UART3_TX
FB_CS4_b/
FB_TSIZ0/
FB_BE31_24_b
92 PTC18
DISABLED
PTC18
UART3_RTS_b
FB_TBST_b/
FB_CS2_b/
FB_BE15_8_b
93 PTD0/
LLWU_P12
DISABLED
PTD0/
LLWU_P12
SPI0_PCS0 UART2_RTS_b
FB_ALE/
FB_CS1_b/
FB_TS_b
94 PTD1
ADC0_SE5b ADC0_SE5b PTD1
SPI0_SCK UART2_CTS_b
FB_CS0_b
95 PTD2/
LLWU_P13
DISABLED
PTD2/
LLWU_P13
SPI0_SOUT UART2_RX
FB_AD4
96 PTD3
DISABLED
PTD3
SPI0_SIN UART2_TX
FB_AD3
97 PTD4/
LLWU_P14
DISABLED
PTD4/
LLWU_P14
SPI0_PCS1 UART0_RTS_b FTM0_CH4
FB_AD2
EWM_IN
98 PTD5
ADC0_SE6b ADC0_SE6b PTD5
SPI0_PCS2
UART0_CTS_ FTM0_CH5
b/
UART0_COL_b
FB_AD1
EWM_OUT_b
99 PTD6/
LLWU_P15
ADC0_SE7b ADC0_SE7b PTD6/
LLWU_P15
SPI0_PCS3 UART0_RX
FTM0_CH6
FB_AD0
FTM0_FLT0
100 PTD7
DISABLED
PTD7
CMT_IRO UART0_TX FTM0_CH7
FTM0_FLT1
Pinout
EzPort
8.2 K10 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K10 Sub-Family Data Sheet, Rev. 1, 6/2012.
Freescale Semiconductor, Inc.
Preliminary
67
General Business Information