K51P100M100SF2 Datasheet, PDF (66/71 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
100 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
LQF
P
40 PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
UART0_RX FTM0_CH6
41 PTA2
JTAG_TDO/ TSI0_CH3 PTA2
TRACE_SW
O/EZP_DO
UART0_TX FTM0_CH7
42 PTA3
JTAG_TMS/ TSI0_CH4 PTA3
SWD_DIO
UART0_RTS FTM0_CH0
_b
43 PTA4
NMI_b/
TSI0_CH5 PTA4
EZP_CS_b
FTM0_CH1
44 PTA12
CMP2_IN0 CMP2_IN0 PTA12
FTM1_CH0
45 PTA13
CMP2_IN1 CMP2_IN1 PTA13
FTM1_CH1
46 PTA14
DISABLED
PTA14
SPI0_PCS0 UART0_TX
47 PTA15
48 VDD
49 VSS
50 PTA18
DISABLED
VDD
VSS
EXTAL
VDD
VSS
EXTAL
PTA15
PTA18
51 PTA19
XTAL
XTAL
PTA19
52 RESET_b
53 PTB0
54 PTB1
55 PTB2
56 PTB3
57 PTB7
58 PTB8
RESET_b RESET_b
LCD_P0/ LCD_P0/ PTB0
ADC0_SE8/ ADC0_SE8/
ADC1_SE8/ ADC1_SE8/
TSI0_CH0 TSI0_CH0
LCD_P1/ LCD_P1/ PTB1
ADC0_SE9/ ADC0_SE9/
ADC1_SE9/ ADC1_SE9/
TSI0_CH6 TSI0_CH6
LCD_P2/ LCD_P2/ PTB2
ADC0_SE12/ ADC0_SE12/
TSI0_CH7 TSI0_CH7
LCD_P3/ LCD_P3/ PTB3
ADC0_SE13/ ADC0_SE13/
TSI0_CH8 TSI0_CH8
LCD_P7/ LCD_P7/ PTB7
ADC1_SE13 ADC1_SE13
LCD_P8 LCD_P8 PTB8
59 PTB9
LCD_P9 LCD_P9 PTB9
60 PTB10
61 PTB11
LCD_P10/ LCD_P10/ PTB10
ADC1_SE14 ADC1_SE14
LCD_P11/ LCD_P11/ PTB11
ADC1_SE15 ADC1_SE15
SPI0_SCK UART0_RX
FTM0_FLT2
FTM1_FLT0
FTM_CLKIN
0
FTM_CLKIN
1
I2C0_SCL FTM1_CH0
I2C0_SDA FTM1_CH1
I2C0_SCL UART0_RTS
_b
I2C0_SDA UART0_CTS
_b
SPI1_PCS1
SPI1_PCS0
UART3_RTS
_b
UART3_CTS
_b
UART3_RX
SPI1_SCK UART3_TX
ALT5
ALT6
ALT7
EzPort
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SW
O
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
I2S0_TXD FTM1_QD_P
HA
I2S0_TX_FS FTM1_QD_P
HB
I2S0_TX_BC
LK
I2S0_RXD
LPT0_ALT1
FTM1_QD_P LCD_P0
HA
FTM1_QD_P LCD_P1
HB
FTM0_FLT3 LCD_P2
FTM0_FLT0 LCD_P3
LCD_P7
LCD_P8
LCD_P9
FTM0_FLT1 LCD_P10
FTM0_FLT2 LCD_P11
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
66
Preliminary
Freescale Semiconductor, Inc.